diff options
Diffstat (limited to 'firmware/target/arm/pp/timer-pp.c')
-rw-r--r-- | firmware/target/arm/pp/timer-pp.c | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/firmware/target/arm/pp/timer-pp.c b/firmware/target/arm/pp/timer-pp.c new file mode 100644 index 0000000000..db859f6b88 --- /dev/null +++ b/firmware/target/arm/pp/timer-pp.c | |||
@@ -0,0 +1,86 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2006 Thom Johansen | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "cpu.h" | ||
23 | #include "system.h" | ||
24 | #include "timer.h" | ||
25 | |||
26 | static long SHAREDBSS_ATTR cycles_new = 0; | ||
27 | |||
28 | void TIMER2(void) | ||
29 | { | ||
30 | TIMER2_VAL; /* ACK interrupt */ | ||
31 | if (cycles_new > 0) | ||
32 | { | ||
33 | TIMER2_CFG = 0xc0000000 | (cycles_new - 1); | ||
34 | cycles_new = 0; | ||
35 | } | ||
36 | if (pfn_timer != NULL) | ||
37 | { | ||
38 | cycles_new = -1; | ||
39 | /* "lock" the variable, in case timer_set_period() | ||
40 | * is called within pfn_timer() */ | ||
41 | pfn_timer(); | ||
42 | cycles_new = 0; | ||
43 | } | ||
44 | } | ||
45 | |||
46 | bool timer_set(long cycles, bool start) | ||
47 | { | ||
48 | if (cycles > 0x20000000 || cycles < 2) | ||
49 | return false; | ||
50 | |||
51 | if (start) | ||
52 | { | ||
53 | if (pfn_unregister != NULL) | ||
54 | { | ||
55 | pfn_unregister(); | ||
56 | pfn_unregister = NULL; | ||
57 | } | ||
58 | CPU_INT_DIS = TIMER2_MASK; | ||
59 | COP_INT_DIS = TIMER2_MASK; | ||
60 | } | ||
61 | if (start || (cycles_new == -1)) /* within isr, cycles_new is "locked" */ | ||
62 | TIMER2_CFG = 0xc0000000 | (cycles - 1); /* enable timer */ | ||
63 | else | ||
64 | cycles_new = cycles; | ||
65 | |||
66 | return true; | ||
67 | } | ||
68 | |||
69 | bool timer_start(IF_COP_VOID(int core)) | ||
70 | { | ||
71 | /* unmask interrupt source */ | ||
72 | #if NUM_CORES > 1 | ||
73 | if (core == COP) | ||
74 | COP_INT_EN = TIMER2_MASK; | ||
75 | else | ||
76 | #endif | ||
77 | CPU_INT_EN = TIMER2_MASK; | ||
78 | return true; | ||
79 | } | ||
80 | |||
81 | void timer_stop(void) | ||
82 | { | ||
83 | TIMER2_CFG = 0; /* stop timer 2 */ | ||
84 | CPU_INT_DIS = TIMER2_MASK; | ||
85 | COP_INT_DIS = TIMER2_MASK; | ||
86 | } | ||