diff options
Diffstat (limited to 'firmware/target/arm/pp/system-pp502x.c')
-rw-r--r-- | firmware/target/arm/pp/system-pp502x.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/firmware/target/arm/pp/system-pp502x.c b/firmware/target/arm/pp/system-pp502x.c index d3331bf9f4..af2e6d7761 100644 --- a/firmware/target/arm/pp/system-pp502x.c +++ b/firmware/target/arm/pp/system-pp502x.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #if !defined(BOOTLOADER) || defined(HAVE_BOOTLOADER_USB_MODE) | 32 | #if !defined(BOOTLOADER) || defined(HAVE_BOOTLOADER_USB_MODE) |
33 | extern void TIMER1(void); | 33 | extern void TIMER1(void); |
34 | extern void TIMER2(void); | 34 | extern void TIMER2(void); |
35 | extern void SERIAL0(void); | 35 | extern void SERIAL_ISR(void); |
36 | 36 | ||
37 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) | 37 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) |
38 | static struct corelock cpufreq_cl SHAREDBSS_ATTR; | 38 | static struct corelock cpufreq_cl SHAREDBSS_ATTR; |
@@ -126,7 +126,6 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void) | |||
126 | button_int(); | 126 | button_int(); |
127 | if (GPIOD_INT_STAT & 0x80) | 127 | if (GPIOD_INT_STAT & 0x80) |
128 | headphones_int(); | 128 | headphones_int(); |
129 | |||
130 | } | 129 | } |
131 | else if (CPU_HI_INT_STAT & GPIO2_MASK) { | 130 | else if (CPU_HI_INT_STAT & GPIO2_MASK) { |
132 | if (GPIOL_INT_STAT & 0x04) | 131 | if (GPIOL_INT_STAT & 0x04) |
@@ -169,8 +168,8 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void) | |||
169 | /* end PBELL_VIBE500 */ | 168 | /* end PBELL_VIBE500 */ |
170 | #endif | 169 | #endif |
171 | #ifdef IPOD_ACCESSORY_PROTOCOL | 170 | #ifdef IPOD_ACCESSORY_PROTOCOL |
172 | else if (CPU_HI_INT_STAT & SER0_MASK) { | 171 | else if (CPU_HI_INT_STAT & (SER0_MASK | SER1_MASK)) { |
173 | SERIAL0(); | 172 | SERIAL_ISR(); |
174 | } | 173 | } |
175 | #endif | 174 | #endif |
176 | } else { | 175 | } else { |
@@ -310,7 +309,7 @@ void set_cpu_frequency(long frequency) | |||
310 | #else | 309 | #else |
311 | static void pp_set_cpu_frequency(long frequency) | 310 | static void pp_set_cpu_frequency(long frequency) |
312 | #endif | 311 | #endif |
313 | { | 312 | { |
314 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) | 313 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) |
315 | corelock_lock(&cpufreq_cl); | 314 | corelock_lock(&cpufreq_cl); |
316 | #endif | 315 | #endif |
@@ -334,7 +333,7 @@ static void pp_set_cpu_frequency(long frequency) | |||
334 | PLL_CONTROL &= ~0x80000000; /* disable PLL */ | 333 | PLL_CONTROL &= ~0x80000000; /* disable PLL */ |
335 | DEV_INIT2 &= ~INIT_PLL; /* disable PLL power */ | 334 | DEV_INIT2 &= ~INIT_PLL; /* disable PLL power */ |
336 | break; | 335 | break; |
337 | 336 | ||
338 | case CPUFREQ_MAX: | 337 | case CPUFREQ_MAX: |
339 | cpu_frequency = CPUFREQ_MAX; | 338 | cpu_frequency = CPUFREQ_MAX; |
340 | DEV_INIT2 |= INIT_PLL; /* enable PLL power */ | 339 | DEV_INIT2 |= INIT_PLL; /* enable PLL power */ |
@@ -379,7 +378,7 @@ static void pp_set_cpu_frequency(long frequency) | |||
379 | DEV_INIT2 &= ~INIT_PLL; /* disable PLL power */ | 378 | DEV_INIT2 &= ~INIT_PLL; /* disable PLL power */ |
380 | break; | 379 | break; |
381 | #else /******** CPUFREQ_NORMAL = 30MHz with PLL ********/ | 380 | #else /******** CPUFREQ_NORMAL = 30MHz with PLL ********/ |
382 | case CPUFREQ_NORMAL: | 381 | case CPUFREQ_NORMAL: |
383 | cpu_frequency = CPUFREQ_NORMAL; | 382 | cpu_frequency = CPUFREQ_NORMAL; |
384 | DEV_INIT2 |= INIT_PLL; /* enable PLL power */ | 383 | DEV_INIT2 |= INIT_PLL; /* enable PLL power */ |
385 | PLL_CONTROL |= 0x88000000; /* enable PLL */ | 384 | PLL_CONTROL |= 0x88000000; /* enable PLL */ |
@@ -421,7 +420,7 @@ static void pp_set_cpu_frequency(long frequency) | |||
421 | DEV_INIT2 &= ~INIT_PLL; /* disable PLL power */ | 420 | DEV_INIT2 &= ~INIT_PLL; /* disable PLL power */ |
422 | break; | 421 | break; |
423 | } | 422 | } |
424 | 423 | ||
425 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) | 424 | #if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1) |
426 | corelock_unlock(&cpufreq_cl); | 425 | corelock_unlock(&cpufreq_cl); |
427 | #endif | 426 | #endif |
@@ -447,7 +446,7 @@ void system_init(void) | |||
447 | DEV_RS2 = 0xffffdfff; | 446 | DEV_RS2 = 0xffffdfff; |
448 | DEV_RS = 0x00000000; | 447 | DEV_RS = 0x00000000; |
449 | DEV_RS2 = 0x00000000; | 448 | DEV_RS2 = 0x00000000; |
450 | #elif defined (IPOD_VIDEO) | 449 | #elif defined (IPOD_VIDEO) |
451 | /* set minimum startup configuration */ | 450 | /* set minimum startup configuration */ |
452 | DEV_EN = 0xc2000124; | 451 | DEV_EN = 0xc2000124; |
453 | DEV_EN2 = 0x00000000; | 452 | DEV_EN2 = 0x00000000; |
@@ -461,7 +460,7 @@ void system_init(void) | |||
461 | DEV_RS2 = 0xffffffff; | 460 | DEV_RS2 = 0xffffffff; |
462 | DEV_RS = 0x00000000; | 461 | DEV_RS = 0x00000000; |
463 | DEV_RS2 = 0x00000000; | 462 | DEV_RS2 = 0x00000000; |
464 | #elif defined (IPOD_NANO) | 463 | #elif defined (IPOD_NANO) |
465 | /* set minimum startup configuration */ | 464 | /* set minimum startup configuration */ |
466 | DEV_EN = 0xc2000124; | 465 | DEV_EN = 0xc2000124; |
467 | DEV_EN2 = 0x00002000; | 466 | DEV_EN2 = 0x00002000; |
@@ -625,4 +624,3 @@ int system_memory_guard(int newmode) | |||
625 | (void)newmode; | 624 | (void)newmode; |
626 | return 0; | 625 | return 0; |
627 | } | 626 | } |
628 | |||