diff options
Diffstat (limited to 'firmware/target/arm/pp/ata-pp5020.c')
-rw-r--r-- | firmware/target/arm/pp/ata-pp5020.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/firmware/target/arm/pp/ata-pp5020.c b/firmware/target/arm/pp/ata-pp5020.c index 176e74993c..7351215693 100644 --- a/firmware/target/arm/pp/ata-pp5020.c +++ b/firmware/target/arm/pp/ata-pp5020.c | |||
@@ -48,8 +48,8 @@ bool ata_is_coldstart() | |||
48 | rest are the same. They go in IDE0_PRI_TIMING0. | 48 | rest are the same. They go in IDE0_PRI_TIMING0. |
49 | 49 | ||
50 | Rockbox used to use 0x10, and test_disk shows that leads to faster PIO. | 50 | Rockbox used to use 0x10, and test_disk shows that leads to faster PIO. |
51 | However on some disks connected with mSATA adapters this causes corrupt data | 51 | However when used with mSATA and some SD adapters this causes corrupt data |
52 | so we now just use these timings from the OF. | 52 | so we now unconditionally use these timings from the OF. |
53 | */ | 53 | */ |
54 | static const unsigned long pio80mhz[] = { | 54 | static const unsigned long pio80mhz[] = { |
55 | 0xC293, 0x43A2, 0x11A1, 0x7232, 0x3131 | 55 | 0xC293, 0x43A2, 0x11A1, 0x7232, 0x3131 |
@@ -83,10 +83,7 @@ void ata_device_init() | |||
83 | /* Setup the timing for PIO mode */ | 83 | /* Setup the timing for PIO mode */ |
84 | void ata_set_pio_timings(int mode) | 84 | void ata_set_pio_timings(int mode) |
85 | { | 85 | { |
86 | if (ata_disk_isssd()) | 86 | IDE0_PRI_TIMING0 = pio80mhz[mode]; |
87 | IDE0_PRI_TIMING0 = pio80mhz[mode]; | ||
88 | else | ||
89 | IDE0_PRI_TIMING0 = 0x10; | ||
90 | } | 87 | } |
91 | 88 | ||
92 | #ifdef HAVE_ATA_DMA | 89 | #ifdef HAVE_ATA_DMA |
@@ -109,6 +106,8 @@ static bool dma_boosted = false; | |||
109 | static bool dma_needs_boost; | 106 | static bool dma_needs_boost; |
110 | #endif | 107 | #endif |
111 | 108 | ||
109 | static int ata_is_ssd = 0; | ||
110 | |||
112 | /* This function sets up registers for 80 Mhz. | 111 | /* This function sets up registers for 80 Mhz. |
113 | Ultra DMA mode 2 works at 30 Mhz. | 112 | Ultra DMA mode 2 works at 30 Mhz. |
114 | */ | 113 | */ |
@@ -136,6 +135,8 @@ void ata_dma_set_mode(unsigned char mode) { | |||
136 | #if !defined(IPOD_NANO) | 135 | #if !defined(IPOD_NANO) |
137 | IDE0_CFG |= 0x20000000; /* >= 50 Mhz */ | 136 | IDE0_CFG |= 0x20000000; /* >= 50 Mhz */ |
138 | #endif | 137 | #endif |
138 | |||
139 | ata_is_ssd = ata_disk_isssd(); | ||
139 | } | 140 | } |
140 | 141 | ||
141 | #define IDE_CFG_INTRQ 8 | 142 | #define IDE_CFG_INTRQ 8 |
@@ -175,11 +176,12 @@ bool ata_dma_setup(void *addr, unsigned long bytes, bool write) { | |||
175 | /* Writes only need to be word-aligned, but by default DMA | 176 | /* Writes only need to be word-aligned, but by default DMA |
176 | * is not used for writing on non-SSDs as it appears to be slower. | 177 | * is not used for writing on non-SSDs as it appears to be slower. |
177 | */ | 178 | */ |
178 | if (!ata_disk_isssd()) | 179 | if (write) { |
179 | return false; | 180 | if ((unsigned long)addr & 3) |
180 | 181 | return false; | |
181 | if (write && ((unsigned long)addr & 3)) | 182 | if (!ata_is_ssd) |
182 | return false; | 183 | return false; |
184 | } | ||
183 | 185 | ||
184 | #if ATA_MAX_UDMA > 2 | 186 | #if ATA_MAX_UDMA > 2 |
185 | if (dma_needs_boost && !dma_boosted) { | 187 | if (dma_needs_boost && !dma_boosted) { |