1 files changed, 26 insertions, 35 deletions
diff --git a/firmware/target/arm/philips/hdd6330/lcd-as-hdd6330.S b/firmware/target/arm/philips/hdd6330/lcd-as-hdd6330.S
index 364eb5b08f..c3a7992a2e 100644
--- a/firmware/target/arm/philips/hdd6330/lcd-as-hdd6330.S
+++ b/firmware/target/arm/philips/hdd6330/lcd-as-hdd6330.S
@@ -48,38 +48,34 @@ lcd_yuv_write_inner_loop:
    ldrb r7, [r1], #1                   @ *usrc++
    ldrb r8, [r2], #1                   @ *vsrc++
-    add r10, r8, r8, asl #2             @ 101* vsrc
+    sub r7, r7, #128                    @ Cb -= 128
+    sub r8, r8, #128                    @ Cr -= 128
+    add r10, r8, r8, asl #2             @ Cr*101
    add r10, r10, r8, asl #5
    add r10, r10, r8, asl #6
-    sub r10, r10, #0x3600
-    sub r10, r10, #0x0020               @ -13856 (ROUNDOFFSR)
-    add r11, r8, r8, asl #1             @ 51*vsrc + 24*usrc
+    add r11, r8, r8, asl #1             @ Cr*51 + Cb*24
    add r11, r11, r11, asl #4
    add r11, r11, r7, asl #3
    add r11, r11, r7, asl #4
-    mov r12, #0x2100
-    add r12, r12, #0x60                 @ +8544 (ROUNDOFFSG) - r11
-    rsb r11, r11, r12
-    mov r12, r7, asl #7                 @ 128 * usrc
+    add r12, r7, #2                     @ r12 = bu = (Cb*128 + 256) >> 9
-    sub r12, r12, #0x4300
+    mov r12, r12, asr #2
-    sub r12, r12, #0x00a0               @ -17312 (ROUNDOFFSB)
+    add r10, r10, #256                  @ r10 = rv = (Cr*101 + 256) >> 9
+    mov r10, r10, asr #9
+    rsb r11, r11, #128                  @ r11 = guv = (-r11 + 128) >> 8
+    mov r11, r11, asr #8
 @ pixel_1
-    ldrb r8, [r0], #1                   @ *ysrc++
+    ldrb r7, [r0], #1                   @ *ysrc++
-    mov r7, r8, asl #1
+    sub r7, r7, #16                     @ Y = (Y' - 16) * 37
-    add r7, r7, r8, asl #3
+    add r8, r7, r7, asl #2
-    add r7, r7, r8, asl #6              @ ysrc * 74
+    add r7, r8, r7, asl #5
-    add r9, r10, r7
-    mov r9, r9, asr #9                  @ R
-    add r8, r11, r7
-    mov r8, r8, asr #8                  @ G
-    add r7, r12, r7
+    add r9, r10, r7, asr #8             @ R = (Y >> 8) + rv
-    mov r7, r7, asr #9                  @ B
+    add r8, r11, r7, asr #7             @ G = (Y >> 7) + guv
+    add r7, r12, r7, asr #8             @ B = (Y >> 8) + bu
    cmp r9, #31                         @ clamp R
    mvnhi r9, r9, asr #31
@@ -101,19 +97,14 @@ lcd_yuv_write_inner_loop:
    add r6, r7, r6, lsr #8
 @ pixel_2
-    ldrb r8, [r0], #1                   @ *ysrc++
+    ldrb r7, [r0], #1                   @ *ysrc++
-    mov r7, r8, asl #1
+    sub r7, r7, #16                     @ Y = (Y' - 16) * 37
-    add r7, r7, r8, asl #3
+    add r8, r7, r7, asl #2
-    add r7, r7, r8, asl #6              @ ysrc * 74
+    add r7, r8, r7, asl #5
-    add r9, r10, r7
+    add r9, r10, r7, asr #8             @ R = (Y >> 8) + rv
-    mov r9, r9, asr #9                  @ R
+    add r8, r11, r7, asr #7             @ G = (Y >> 7) + guv
+    add r7, r12, r7, asr #8             @ B = (Y >> 8) + bu
-    add r8, r11, r7
-    mov r8, r8, asr #8                  @ G
-    add r7, r12, r7
-    mov r7, r7, asr #9                  @ B
    cmp r9, #31                         @ clamp R
    mvnhi r9, r9, asr #31

diff --git a/firmware/target/arm/philips/hdd6330/lcd-as-hdd6330.S b/firmware/target/arm/philips/hdd6330/lcd-as-hdd6330.S index 364eb5b08f..c3a7992a2e 100644 --- a/firmware/target/arm/philips/hdd6330/lcd-as-hdd6330.S +++ b/firmware/target/arm/philips/hdd6330/lcd-as-hdd6330.S
@@ -48,38 +48,34 @@ lcd_yuv_write_inner_loop:
48	ldrb r7, [r1], #1 @ *usrc++	48	ldrb r7, [r1], #1 @ *usrc++
49	ldrb r8, [r2], #1 @ *vsrc++	49	ldrb r8, [r2], #1 @ *vsrc++
50		50
51	add r10, r8, r8, asl #2 @ 101* vsrc	51	sub r7, r7, #128 @ Cb -= 128
		52	sub r8, r8, #128 @ Cr -= 128
		53
		54	add r10, r8, r8, asl #2 @ Cr*101
52	add r10, r10, r8, asl #5	55	add r10, r10, r8, asl #5
53	add r10, r10, r8, asl #6	56	add r10, r10, r8, asl #6
54	sub r10, r10, #0x3600
55	sub r10, r10, #0x0020 @ -13856 (ROUNDOFFSR)
56		57
57	add r11, r8, r8, asl #1 @ 51vsrc + 24usrc	58	add r11, r8, r8, asl #1 @ Cr51 + Cb24
58	add r11, r11, r11, asl #4	59	add r11, r11, r11, asl #4
59	add r11, r11, r7, asl #3	60	add r11, r11, r7, asl #3
60	add r11, r11, r7, asl #4	61	add r11, r11, r7, asl #4
61	mov r12, #0x2100
62	add r12, r12, #0x60 @ +8544 (ROUNDOFFSG) - r11
63	rsb r11, r11, r12
64		62
65	mov r12, r7, asl #7 @ 128 * usrc	63	add r12, r7, #2 @ r12 = bu = (Cb*128 + 256) >> 9
66	sub r12, r12, #0x4300	64	mov r12, r12, asr #2
67	sub r12, r12, #0x00a0 @ -17312 (ROUNDOFFSB)	65	add r10, r10, #256 @ r10 = rv = (Cr*101 + 256) >> 9
		66	mov r10, r10, asr #9
		67	rsb r11, r11, #128 @ r11 = guv = (-r11 + 128) >> 8
		68	mov r11, r11, asr #8
68		69
69	@ pixel_1	70	@ pixel_1
70	ldrb r8, [r0], #1 @ *ysrc++	71	ldrb r7, [r0], #1 @ *ysrc++
71	mov r7, r8, asl #1	72	sub r7, r7, #16 @ Y = (Y' - 16) * 37
72	add r7, r7, r8, asl #3	73	add r8, r7, r7, asl #2
73	add r7, r7, r8, asl #6 @ ysrc * 74	74	add r7, r8, r7, asl #5
74
75	add r9, r10, r7
76	mov r9, r9, asr #9 @ R
77
78	add r8, r11, r7
79	mov r8, r8, asr #8 @ G
80		75
81	add r7, r12, r7	76	add r9, r10, r7, asr #8 @ R = (Y >> 8) + rv
82	mov r7, r7, asr #9 @ B	77	add r8, r11, r7, asr #7 @ G = (Y >> 7) + guv
		78	add r7, r12, r7, asr #8 @ B = (Y >> 8) + bu
83		79
84	cmp r9, #31 @ clamp R	80	cmp r9, #31 @ clamp R
85	mvnhi r9, r9, asr #31	81	mvnhi r9, r9, asr #31
@@ -101,19 +97,14 @@ lcd_yuv_write_inner_loop:
101	add r6, r7, r6, lsr #8	97	add r6, r7, r6, lsr #8
102		98
103	@ pixel_2	99	@ pixel_2
104	ldrb r8, [r0], #1 @ *ysrc++	100	ldrb r7, [r0], #1 @ *ysrc++
105	mov r7, r8, asl #1	101	sub r7, r7, #16 @ Y = (Y' - 16) * 37
106	add r7, r7, r8, asl #3	102	add r8, r7, r7, asl #2
107	add r7, r7, r8, asl #6 @ ysrc * 74	103	add r7, r8, r7, asl #5
108		104
109	add r9, r10, r7	105	add r9, r10, r7, asr #8 @ R = (Y >> 8) + rv
110	mov r9, r9, asr #9 @ R	106	add r8, r11, r7, asr #7 @ G = (Y >> 7) + guv
111		107	add r7, r12, r7, asr #8 @ B = (Y >> 8) + bu
112	add r8, r11, r7
113	mov r8, r8, asr #8 @ G
114
115	add r7, r12, r7
116	mov r7, r7, asr #9 @ B
117		108
118	cmp r9, #31 @ clamp R	109	cmp r9, #31 @ clamp R
119	mvnhi r9, r9, asr #31	110	mvnhi r9, r9, asr #31