1 files changed, 8 insertions, 8 deletions
diff --git a/firmware/target/arm/mmu-armv6.S b/firmware/target/arm/mmu-armv6.S
index 12381adf8b..c4cb49ea26 100644
--- a/firmware/target/arm/mmu-armv6.S
+++ b/firmware/target/arm/mmu-armv6.S
@@ -32,7 +32,7 @@
 * from DCache afterwards
 * void commit_discard_dcache_range(const void *base, unsigned int size);
 */
-    .section   .text, "ax", %progbits
+    .section   .text.commit_discard_dcache_range, "ax", %progbits
    .align      2
    .global     commit_discard_dcache_range
    .type       commit_discard_dcache_range, %function
@@ -56,7 +56,7 @@ invalidate_dcache_range:
 * Write DCache back to RAM for the given range
 * void commit_dcache_range(const void *base, unsigned int size);
 */
-    .section   .text, "ax", %progbits
+    .section   .text.commit_dcache_range, "ax", %progbits
    .align      2
    .global     commit_dcache_range
    .type       commit_dcache_range, %function
@@ -79,7 +79,7 @@ clean_dcache_range:
 * will *NOT* do write back except for buffer edges not on a line boundary
 * void discard_dcache_range(const void *base, unsigned int size);
 */
-    .section   .text, "ax", %progbits
+    .section   .text.discard_dcache_range, "ax", %progbits
    .align      2
    .global     discard_dcache_range
    .type       discard_dcache_range, %function
@@ -90,7 +90,7 @@ discard_dcache_range:
 dump_dcache_range:
    add     r1, r0, r1              @ size -> end
    cmp     r1, r0                  @ end <= start?
-    bxls    lr                      @ 
+    bxls    lr                      @
    tst     r0, #31                 @ Check first line for bits set
    bicne   r0, r0, #31             @ Clear low five bits (down)
    mcrne   p15, 0, r0, c7, c14, 1  @ Clean and invalidate line by MVA
@@ -114,7 +114,7 @@ dump_dcache_range:
 * Write entire DCache back to RAM
 * void commit_dcache(void);
 */
-    .section   .text, "ax", %progbits
+    .section   .text.commit_dcache, "ax", %progbits
    .align      2
    .global     commit_dcache
    .type       commit_dcache, %function
@@ -136,7 +136,7 @@ cpucache_flush:
 * Clean and invalidate entire DCache, will do writeback
 * void commit_discard_dcache(void);
 */
-    .section   .icode, "ax", %progbits
+    .section   .icode.commit_discard_dcache, "ax", %progbits
    .align      2
    .global     commit_discard_dcache
    .type       commit_discard_dcache, %function
@@ -149,13 +149,13 @@ invalidate_dcache:
    mcr     p15, 0, r0, c7, c10, 4  @ Data synchronization barrier
    bx      lr                      @
    .size   commit_discard_dcache, .-commit_discard_dcache
-    
 /*
 * Discards the entire ICache, and commit+discards the entire DCache
 * void cpucache_commit_discard(void);
 */
-    .section   .icode, "ax", %progbits
+    .section   .icode.cpucache_commit_discard, "ax", %progbits
    .align      2
    .global     cpucache_commit_discard
    .type       cpucache_commit_discard, %function

diff --git a/firmware/target/arm/mmu-armv6.S b/firmware/target/arm/mmu-armv6.S index 12381adf8b..c4cb49ea26 100644 --- a/firmware/target/arm/mmu-armv6.S +++ b/firmware/target/arm/mmu-armv6.S
@@ -32,7 +32,7 @@
32	* from DCache afterwards	32	* from DCache afterwards
33	* void commit_discard_dcache_range(const void *base, unsigned int size);	33	* void commit_discard_dcache_range(const void *base, unsigned int size);
34	*/	34	*/
35	.section .text, "ax", %progbits	35	.section .text.commit_discard_dcache_range, "ax", %progbits
36	.align 2	36	.align 2
37	.global commit_discard_dcache_range	37	.global commit_discard_dcache_range
38	.type commit_discard_dcache_range, %function	38	.type commit_discard_dcache_range, %function
@@ -56,7 +56,7 @@ invalidate_dcache_range:
56	* Write DCache back to RAM for the given range	56	* Write DCache back to RAM for the given range
57	* void commit_dcache_range(const void *base, unsigned int size);	57	* void commit_dcache_range(const void *base, unsigned int size);
58	*/	58	*/
59	.section .text, "ax", %progbits	59	.section .text.commit_dcache_range, "ax", %progbits
60	.align 2	60	.align 2
61	.global commit_dcache_range	61	.global commit_dcache_range
62	.type commit_dcache_range, %function	62	.type commit_dcache_range, %function
@@ -79,7 +79,7 @@ clean_dcache_range:
79	* will NOT do write back except for buffer edges not on a line boundary	79	* will NOT do write back except for buffer edges not on a line boundary
80	* void discard_dcache_range(const void *base, unsigned int size);	80	* void discard_dcache_range(const void *base, unsigned int size);
81	*/	81	*/
82	.section .text, "ax", %progbits	82	.section .text.discard_dcache_range, "ax", %progbits
83	.align 2	83	.align 2
84	.global discard_dcache_range	84	.global discard_dcache_range
85	.type discard_dcache_range, %function	85	.type discard_dcache_range, %function
@@ -90,7 +90,7 @@ discard_dcache_range:
90	dump_dcache_range:	90	dump_dcache_range:
91	add r1, r0, r1 @ size -> end	91	add r1, r0, r1 @ size -> end
92	cmp r1, r0 @ end <= start?	92	cmp r1, r0 @ end <= start?
93	bxls lr @	93	bxls lr @
94	tst r0, #31 @ Check first line for bits set	94	tst r0, #31 @ Check first line for bits set
95	bicne r0, r0, #31 @ Clear low five bits (down)	95	bicne r0, r0, #31 @ Clear low five bits (down)
96	mcrne p15, 0, r0, c7, c14, 1 @ Clean and invalidate line by MVA	96	mcrne p15, 0, r0, c7, c14, 1 @ Clean and invalidate line by MVA
@@ -114,7 +114,7 @@ dump_dcache_range:
114	* Write entire DCache back to RAM	114	* Write entire DCache back to RAM
115	* void commit_dcache(void);	115	* void commit_dcache(void);
116	*/	116	*/
117	.section .text, "ax", %progbits	117	.section .text.commit_dcache, "ax", %progbits
118	.align 2	118	.align 2
119	.global commit_dcache	119	.global commit_dcache
120	.type commit_dcache, %function	120	.type commit_dcache, %function
@@ -136,7 +136,7 @@ cpucache_flush:
136	* Clean and invalidate entire DCache, will do writeback	136	* Clean and invalidate entire DCache, will do writeback
137	* void commit_discard_dcache(void);	137	* void commit_discard_dcache(void);
138	*/	138	*/
139	.section .icode, "ax", %progbits	139	.section .icode.commit_discard_dcache, "ax", %progbits
140	.align 2	140	.align 2
141	.global commit_discard_dcache	141	.global commit_discard_dcache
142	.type commit_discard_dcache, %function	142	.type commit_discard_dcache, %function
@@ -149,13 +149,13 @@ invalidate_dcache:
149	mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier	149	mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier
150	bx lr @	150	bx lr @
151	.size commit_discard_dcache, .-commit_discard_dcache	151	.size commit_discard_dcache, .-commit_discard_dcache
152		152
153		153
154	/*	154	/*
155	* Discards the entire ICache, and commit+discards the entire DCache	155	* Discards the entire ICache, and commit+discards the entire DCache
156	* void cpucache_commit_discard(void);	156	* void cpucache_commit_discard(void);
157	*/	157	*/
158	.section .icode, "ax", %progbits	158	.section .icode.cpucache_commit_discard, "ax", %progbits
159	.align 2	159	.align 2
160	.global cpucache_commit_discard	160	.global cpucache_commit_discard
161	.type cpucache_commit_discard, %function	161	.type cpucache_commit_discard, %function