diff options
Diffstat (limited to 'firmware/target/arm/iriver/h10/adc-h10.c')
-rw-r--r-- | firmware/target/arm/iriver/h10/adc-h10.c | 90 |
1 files changed, 64 insertions, 26 deletions
diff --git a/firmware/target/arm/iriver/h10/adc-h10.c b/firmware/target/arm/iriver/h10/adc-h10.c index df9b16359b..f63e8b8013 100644 --- a/firmware/target/arm/iriver/h10/adc-h10.c +++ b/firmware/target/arm/iriver/h10/adc-h10.c | |||
@@ -25,29 +25,21 @@ | |||
25 | 25 | ||
26 | static unsigned short adcdata[NUM_ADC_CHANNELS]; | 26 | static unsigned short adcdata[NUM_ADC_CHANNELS]; |
27 | 27 | ||
28 | /* Scan ADC so that adcdata[channel] gets updated */ | 28 | /* Scan ADC so that adcdata[channel] gets updated. */ |
29 | unsigned short adc_scan(int channel) | 29 | unsigned short adc_scan(int channel) |
30 | { | 30 | { |
31 | unsigned int adc_data_1; | 31 | unsigned int adc_data_1; |
32 | unsigned int adc_data_2; | 32 | unsigned int adc_data_2; |
33 | 33 | ||
34 | /* Initialise */ | 34 | /* Start conversion */ |
35 | ADC_ADDR=0x130; | 35 | ADC_ADDR |= 0x80000000; |
36 | ADC_STATUS=0; /* 4 bytes, 1 per channel. Each byte is 0 if the channel is | ||
37 | off, 0x40 if the channel is on */ | ||
38 | 36 | ||
39 | /* Enable Channel */ | 37 | /* Wait for conversion to complete */ |
40 | ADC_ADDR |= (0x1000000<<channel); | 38 | while((ADC_STATUS & (0x40<<8*channel))==0); |
39 | |||
40 | /* Stop conversion */ | ||
41 | ADC_ADDR &=~ 0x80000000; | ||
41 | 42 | ||
42 | /* Start? */ | ||
43 | ADC_ADDR |= 0x20000000; | ||
44 | ADC_ADDR |= 0x80000000; | ||
45 | |||
46 | #if 0 | ||
47 | /* wait for ADC ready. THIS IS NOT WORKING (locks up) */ | ||
48 | while(ADC_STATUS & (0x40 << (channel*8))); /* add loop protection here */ | ||
49 | #endif | ||
50 | |||
51 | /* ADC_DATA_1 and ADC_DATA_2 are both four bytes, one byte per channel. | 43 | /* ADC_DATA_1 and ADC_DATA_2 are both four bytes, one byte per channel. |
52 | For each channel, ADC_DATA_1 stores the 8-bit msb, ADC_DATA_2 stores the | 44 | For each channel, ADC_DATA_1 stores the 8-bit msb, ADC_DATA_2 stores the |
53 | 2-bit lsb (in bits 0 and 1). Each channel is 10 bits total. */ | 45 | 2-bit lsb (in bits 0 and 1). Each channel is 10 bits total. */ |
@@ -56,6 +48,13 @@ unsigned short adc_scan(int channel) | |||
56 | 48 | ||
57 | adcdata[channel] = (adc_data_1<<2 | adc_data_2); | 49 | adcdata[channel] = (adc_data_1<<2 | adc_data_2); |
58 | 50 | ||
51 | /* ADC values read low if PLL is enabled */ | ||
52 | if(PLL_CONTROL & 0x80000000){ | ||
53 | adcdata[channel] += 0x14; | ||
54 | if(adcdata[channel] > 0x400) | ||
55 | adcdata[channel] = 0x400; | ||
56 | } | ||
57 | |||
59 | return adcdata[channel]; | 58 | return adcdata[channel]; |
60 | } | 59 | } |
61 | 60 | ||
@@ -79,25 +78,64 @@ static void adc_tick(void) | |||
79 | } | 78 | } |
80 | } | 79 | } |
81 | 80 | ||
81 | /* Figured out from how the OF does things */ | ||
82 | void adc_init(void) | 82 | void adc_init(void) |
83 | { | 83 | { |
84 | /* Enable ADC */ | 84 | ADC_INIT |= 1; |
85 | ADC_ENABLE_ADDR |= ADC_ENABLE; | 85 | ADC_INIT |= 0x40000000; |
86 | udelay(100); | ||
87 | |||
88 | /* Reset ADC */ | ||
89 | DEV_RS2 |= 0x20; | ||
90 | udelay(100); | ||
91 | |||
92 | DEV_RS2 &=~ 0x20; | ||
93 | udelay(100); | ||
86 | 94 | ||
87 | /* Initialise */ | 95 | /* Enable ADC */ |
88 | ADC_INIT=0; | 96 | DEV_EN2 |= 0x20; |
97 | udelay(100); | ||
98 | |||
99 | ADC_CLOCK_SRC |= 0x3; | ||
100 | udelay(100); | ||
101 | |||
102 | ADC_ADDR |= 0x40; | ||
103 | ADC_ADDR |= 0x20000000; | ||
104 | udelay(100); | ||
105 | |||
106 | ADC_INIT; | ||
107 | ADC_INIT = 0; | ||
108 | udelay(100); | ||
109 | |||
110 | ADC_STATUS = 0; | ||
111 | |||
112 | /* Enable channel 0 (battery) */ | ||
113 | DEV_INIT1 &=~0x3; | ||
114 | ADC_ADDR |= 0x1000000; | ||
115 | ADC_STATUS |= 0x20; | ||
116 | |||
117 | /* Enable channel 1 (unknown, temperature?) */ | ||
118 | DEV_INIT1 &=~30; | ||
119 | ADC_ADDR |= 0x2000000; | ||
120 | ADC_STATUS |= 0x2000; | ||
121 | |||
122 | /* Enable channel 2 (remote) */ | ||
123 | DEV_INIT1 &=~0x300; | ||
124 | DEV_INIT1 |= 0x100; | ||
125 | ADC_ADDR |= 0x4000000; | ||
126 | ADC_STATUS |= 0x200000; | ||
127 | |||
128 | /* Enable channel 3 (scroll pad) */ | ||
129 | DEV_INIT1 &=~0x3000; | ||
130 | DEV_INIT1 |= 0x1000; | ||
131 | ADC_ADDR |= 0x8000000; | ||
132 | ADC_STATUS |= 0x20000000; | ||
89 | 133 | ||
90 | /* Force a scan of all channels to get initial values */ | 134 | /* Force a scan of all channels to get initial values */ |
91 | adc_scan(ADC_BATTERY); | 135 | adc_scan(ADC_BATTERY); |
92 | adc_scan(ADC_UNKNOWN_1); | 136 | adc_scan(ADC_UNKNOWN_1); |
93 | adc_scan(ADC_REMOTE); | 137 | adc_scan(ADC_REMOTE); |
94 | adc_scan(ADC_SCROLLPAD); | 138 | adc_scan(ADC_SCROLLPAD); |
95 | |||
96 | /* FIXME: The ADC sometimes reads 0 for the battery | ||
97 | voltage for the first few seconds. It would be better to fix this by | ||
98 | figuring out how to use the ADC properly. Until then, work around the | ||
99 | problem by waiting until it reads a proper value*/ | ||
100 | while(adc_scan(ADC_UNREG_POWER)==0); | ||
101 | 139 | ||
102 | tick_add_task(adc_tick); | 140 | tick_add_task(adc_tick); |
103 | } | 141 | } |