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Diffstat (limited to 'firmware/target/arm/imx31/sdma-imx31.c')
-rw-r--r--firmware/target/arm/imx31/sdma-imx31.c143
1 files changed, 33 insertions, 110 deletions
diff --git a/firmware/target/arm/imx31/sdma-imx31.c b/firmware/target/arm/imx31/sdma-imx31.c
index 381e589c08..39f4e29554 100644
--- a/firmware/target/arm/imx31/sdma-imx31.c
+++ b/firmware/target/arm/imx31/sdma-imx31.c
@@ -35,8 +35,6 @@
35 35
36/* Cut down to bare bones essentials */ 36/* Cut down to bare bones essentials */
37 37
38/* Script information that depends on system revision */
39static struct sdma_script_start_addrs script_info;
40/* Mask of channels with callback enabled */ 38/* Mask of channels with callback enabled */
41static unsigned long sdma_enabled_ints = 0; 39static unsigned long sdma_enabled_ints = 0;
42/* One channel control block per channel in physically mapped device RAM */ 40/* One channel control block per channel in physically mapped device RAM */
@@ -71,79 +69,6 @@ static void __attribute__((interrupt("IRQ"))) SDMA_HANDLER(void)
71 } 69 }
72} 70}
73 71
74/* Initialize script information based upon the system revision */
75static void init_script_info(void)
76{
77 if (iim_system_rev() == IIM_SREV_1_0)
78 {
79 /* Channel script info */
80 script_info.app_2_mcu_addr = app_2_mcu_ADDR_1;
81 script_info.ap_2_ap_addr = ap_2_ap_ADDR_1;
82 script_info.ap_2_bp_addr = -1;
83 script_info.bp_2_ap_addr = -1;
84 script_info.loopback_on_dsp_side_addr = -1;
85 script_info.mcu_2_app_addr = mcu_2_app_ADDR_1;
86 script_info.mcu_2_shp_addr = mcu_2_shp_ADDR_1;
87 script_info.mcu_interrupt_only_addr = -1;
88 script_info.shp_2_mcu_addr = shp_2_mcu_ADDR_1;
89 script_info.uartsh_2_mcu_addr = uartsh_2_mcu_ADDR_1;
90 script_info.uart_2_mcu_addr = uart_2_mcu_ADDR_1;
91 script_info.dptc_dvfs_addr = dptc_dvfs_ADDR_1;
92 script_info.firi_2_mcu_addr = firi_2_mcu_ADDR_1;
93 script_info.firi_2_per_addr = -1;
94 script_info.mshc_2_mcu_addr = mshc_2_mcu_ADDR_1;
95 script_info.per_2_app_addr = -1;
96 script_info.per_2_firi_addr = -1;
97 script_info.per_2_shp_addr = -1;
98 script_info.mcu_2_ata_addr = mcu_2_ata_ADDR_1;
99 script_info.mcu_2_firi_addr = mcu_2_firi_ADDR_1;
100 script_info.mcu_2_mshc_addr = mcu_2_mshc_ADDR_1;
101 script_info.ata_2_mcu_addr = ata_2_mcu_ADDR_1;
102 script_info.uartsh_2_per_addr = -1;
103 script_info.shp_2_per_addr = -1;
104 script_info.uart_2_per_addr = -1;
105 script_info.app_2_per_addr = -1;
106 /* Main code block info */
107 script_info.ram_code_size = RAM_CODE_SIZE_1;
108 script_info.ram_code_start_addr = RAM_CODE_START_ADDR_1;
109 script_info.mcu_start_addr = (unsigned long)sdma_code_1;
110 }
111 else
112 {
113 /* Channel script info */
114 script_info.app_2_mcu_addr = app_2_mcu_patched_ADDR_2;
115 script_info.ap_2_ap_addr = ap_2_ap_ADDR_2;
116 script_info.ap_2_bp_addr = ap_2_bp_ADDR_2;
117 script_info.bp_2_ap_addr = bp_2_ap_ADDR_2;
118 script_info.loopback_on_dsp_side_addr = -1;
119 script_info.mcu_2_app_addr = mcu_2_app_patched_ADDR_2;
120 script_info.mcu_2_shp_addr = mcu_2_shp_patched_ADDR_2;
121 script_info.mcu_interrupt_only_addr = -1;
122 script_info.shp_2_mcu_addr = shp_2_mcu_patched_ADDR_2;
123 script_info.uartsh_2_mcu_addr = uartsh_2_mcu_patched_ADDR_2;
124 script_info.uart_2_mcu_addr = uart_2_mcu_patched_ADDR_2;
125 script_info.dptc_dvfs_addr = -1;
126 script_info.firi_2_mcu_addr = firi_2_mcu_ADDR_2;
127 script_info.firi_2_per_addr = -1;
128 script_info.mshc_2_mcu_addr = -1;
129 script_info.per_2_app_addr = -1;
130 script_info.per_2_firi_addr = -1;
131 script_info.per_2_shp_addr = per_2_shp_ADDR_2;
132 script_info.mcu_2_ata_addr = mcu_2_ata_ADDR_2;
133 script_info.mcu_2_firi_addr = mcu_2_firi_ADDR_2;
134 script_info.mcu_2_mshc_addr = -1;
135 script_info.ata_2_mcu_addr = ata_2_mcu_ADDR_2;
136 script_info.uartsh_2_per_addr = -1;
137 script_info.shp_2_per_addr = shp_2_per_ADDR_2;
138 script_info.uart_2_per_addr = -1;
139 script_info.app_2_per_addr = -1;
140 /* Main code block info */
141 script_info.ram_code_size = RAM_CODE_SIZE_2;
142 script_info.ram_code_start_addr = RAM_CODE_START_ADDR_2;
143 script_info.mcu_start_addr = (unsigned long)sdma_code_2;
144 }
145}
146
147/* Return pc of SDMA script in SDMA halfword space according to peripheral 72/* Return pc of SDMA script in SDMA halfword space according to peripheral
148 * and transfer type */ 73 * and transfer type */
149static unsigned long get_script_pc(unsigned int peripheral_type, 74static unsigned long get_script_pc(unsigned int peripheral_type,
@@ -159,7 +84,7 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
159 case SDMA_TRAN_EMI_2_INT: 84 case SDMA_TRAN_EMI_2_INT:
160 case SDMA_TRAN_EMI_2_EMI: 85 case SDMA_TRAN_EMI_2_EMI:
161 case SDMA_TRAN_INT_2_EMI: 86 case SDMA_TRAN_INT_2_EMI:
162 res = script_info.ap_2_ap_addr; 87 res = AP_2_AP_ADDR;
163 break; 88 break;
164 } 89 }
165 break; 90 break;
@@ -169,16 +94,16 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
169 switch (transfer_type) 94 switch (transfer_type)
170 { 95 {
171 case SDMA_TRAN_EMI_2_DSP: 96 case SDMA_TRAN_EMI_2_DSP:
172 res = script_info.ap_2_bp_addr; 97 res = AP_2_BP_ADDR;
173 break; 98 break;
174 case SDMA_TRAN_DSP_2_EMI: 99 case SDMA_TRAN_DSP_2_EMI:
175 res = script_info.bp_2_ap_addr; 100 res = BP_2_AP_ADDR;
176 break; 101 break;
177 case SDMA_TRAN_DSP_2_EMI_LOOP: 102 case SDMA_TRAN_DSP_2_EMI_LOOP:
178 res = script_info.loopback_on_dsp_side_addr; 103 res = LOOPBACK_ON_DSP_SIDE_ADDR;
179 break; 104 break;
180 case SDMA_TRAN_EMI_2_DSP_LOOP: 105 case SDMA_TRAN_EMI_2_DSP_LOOP:
181 res = script_info.mcu_interrupt_only_addr; 106 res = MCU_INTERRUPT_ONLY_ADDR;
182 break; 107 break;
183 } 108 }
184 break; 109 break;
@@ -189,16 +114,16 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
189 switch (transfer_type) 114 switch (transfer_type)
190 { 115 {
191 case SDMA_TRAN_PER_2_INT: 116 case SDMA_TRAN_PER_2_INT:
192 res = script_info.firi_2_per_addr; 117 res = FIRI_2_PER_ADDR;
193 break; 118 break;
194 case SDMA_TRAN_PER_2_EMI: 119 case SDMA_TRAN_PER_2_EMI:
195 res = script_info.firi_2_mcu_addr; 120 res = FIRI_2_MCU_ADDR;
196 break; 121 break;
197 case SDMA_TRAN_INT_2_PER: 122 case SDMA_TRAN_INT_2_PER:
198 res = script_info.per_2_firi_addr; 123 res = PER_2_FIRI_ADDR;
199 break; 124 break;
200 case SDMA_TRAN_EMI_2_PER: 125 case SDMA_TRAN_EMI_2_PER:
201 res = script_info.mcu_2_firi_addr; 126 res = MCU_2_FIRI_ADDR;
202 break; 127 break;
203 } 128 }
204 break; 129 break;
@@ -209,16 +134,16 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
209 switch (transfer_type) 134 switch (transfer_type)
210 { 135 {
211 case SDMA_TRAN_PER_2_INT: 136 case SDMA_TRAN_PER_2_INT:
212 res = script_info.uart_2_per_addr; 137 res = UART_2_PER_ADDR;
213 break; 138 break;
214 case SDMA_TRAN_PER_2_EMI: 139 case SDMA_TRAN_PER_2_EMI:
215 res = script_info.uart_2_mcu_addr; 140 res = UART_2_MCU_ADDR;
216 break; 141 break;
217 case SDMA_TRAN_INT_2_PER: 142 case SDMA_TRAN_INT_2_PER:
218 res = script_info.per_2_app_addr; 143 res = PER_2_APP_ADDR;
219 break; 144 break;
220 case SDMA_TRAN_EMI_2_PER: 145 case SDMA_TRAN_EMI_2_PER:
221 res = script_info.mcu_2_app_addr; 146 res = MCU_2_APP_ADDR;
222 break; 147 break;
223 } 148 }
224 break; 149 break;
@@ -229,16 +154,16 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
229 switch (transfer_type) 154 switch (transfer_type)
230 { 155 {
231 case SDMA_TRAN_PER_2_INT: 156 case SDMA_TRAN_PER_2_INT:
232 res = script_info.uartsh_2_per_addr; 157 res = UARTSH_2_PER_ADDR;
233 break; 158 break;
234 case SDMA_TRAN_PER_2_EMI: 159 case SDMA_TRAN_PER_2_EMI:
235 res = script_info.uartsh_2_mcu_addr; 160 res = UARTSH_2_MCU_ADDR;
236 break; 161 break;
237 case SDMA_TRAN_INT_2_PER: 162 case SDMA_TRAN_INT_2_PER:
238 res = script_info.per_2_shp_addr; 163 res = PER_2_SHP_ADDR;
239 break; 164 break;
240 case SDMA_TRAN_EMI_2_PER: 165 case SDMA_TRAN_EMI_2_PER:
241 res = script_info.mcu_2_shp_addr; 166 res = MCU_2_SHP_ADDR;
242 break; 167 break;
243 } 168 }
244 break; 169 break;
@@ -248,10 +173,10 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
248 switch (transfer_type) 173 switch (transfer_type)
249 { 174 {
250 case SDMA_TRAN_PER_2_EMI: 175 case SDMA_TRAN_PER_2_EMI:
251 res = script_info.ata_2_mcu_addr; 176 res = ATA_2_MCU_ADDR;
252 break; 177 break;
253 case SDMA_TRAN_EMI_2_PER: 178 case SDMA_TRAN_EMI_2_PER:
254 res = script_info.mcu_2_ata_addr; 179 res = MCU_2_ATA_ADDR;
255 break; 180 break;
256 } 181 }
257 break; 182 break;
@@ -262,16 +187,16 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
262 switch (transfer_type) 187 switch (transfer_type)
263 { 188 {
264 case SDMA_TRAN_PER_2_INT: 189 case SDMA_TRAN_PER_2_INT:
265 res = script_info.app_2_per_addr; 190 res = APP_2_PER_ADDR;
266 break; 191 break;
267 case SDMA_TRAN_PER_2_EMI: 192 case SDMA_TRAN_PER_2_EMI:
268 res = script_info.app_2_mcu_addr; 193 res = APP_2_MCU_ADDR;
269 break; 194 break;
270 case SDMA_TRAN_INT_2_PER: 195 case SDMA_TRAN_INT_2_PER:
271 res = script_info.per_2_app_addr; 196 res = PER_2_APP_ADDR;
272 break; 197 break;
273 case SDMA_TRAN_EMI_2_PER: 198 case SDMA_TRAN_EMI_2_PER:
274 res = script_info.mcu_2_app_addr; 199 res = MCU_2_APP_ADDR;
275 break; 200 break;
276 } 201 }
277 break; 202 break;
@@ -285,16 +210,16 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
285 switch (transfer_type) 210 switch (transfer_type)
286 { 211 {
287 case SDMA_TRAN_PER_2_INT: 212 case SDMA_TRAN_PER_2_INT:
288 res = script_info.shp_2_per_addr; 213 res = SHP_2_PER_ADDR;
289 break; 214 break;
290 case SDMA_TRAN_PER_2_EMI: 215 case SDMA_TRAN_PER_2_EMI:
291 res = script_info.shp_2_mcu_addr; 216 res = SHP_2_MCU_ADDR;
292 break; 217 break;
293 case SDMA_TRAN_INT_2_PER: 218 case SDMA_TRAN_INT_2_PER:
294 res = script_info.per_2_shp_addr; 219 res = PER_2_SHP_ADDR;
295 break; 220 break;
296 case SDMA_TRAN_EMI_2_PER: 221 case SDMA_TRAN_EMI_2_PER:
297 res = script_info.mcu_2_shp_addr; 222 res = MCU_2_SHP_ADDR;
298 break; 223 break;
299 } 224 }
300 break; 225 break;
@@ -303,10 +228,10 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
303 switch (transfer_type) 228 switch (transfer_type)
304 { 229 {
305 case SDMA_TRAN_PER_2_EMI: 230 case SDMA_TRAN_PER_2_EMI:
306 res = script_info.mshc_2_mcu_addr; 231 res = MSHC_2_MCU_ADDR;
307 break; 232 break;
308 case SDMA_TRAN_EMI_2_PER: 233 case SDMA_TRAN_EMI_2_PER:
309 res = script_info.mcu_2_mshc_addr; 234 res = MCU_2_MSHC_ADDR;
310 break; 235 break;
311 } 236 }
312 break; 237 break;
@@ -315,7 +240,7 @@ static unsigned long get_script_pc(unsigned int peripheral_type,
315 switch (transfer_type) 240 switch (transfer_type)
316 { 241 {
317 case SDMA_TRAN_PER_2_EMI: 242 case SDMA_TRAN_PER_2_EMI:
318 res = script_info.dptc_dvfs_addr; 243 res = DPTC_DVFS_ADDR;
319 break; 244 break;
320 } 245 }
321 break; 246 break;
@@ -511,8 +436,6 @@ void INIT_ATTR sdma_init(void)
511 SDMA_RESET |= SDMA_RESET_RESET; 436 SDMA_RESET |= SDMA_RESET_RESET;
512 while (SDMA_RESET & SDMA_RESET_RESET); 437 while (SDMA_RESET & SDMA_RESET_RESET);
513 438
514 init_script_info();
515
516 /* No channel enabled, all priorities 0 */ 439 /* No channel enabled, all priorities 0 */
517 for (i = 0; i < CH_NUM; i++) 440 for (i = 0; i < CH_NUM; i++)
518 { 441 {
@@ -561,9 +484,9 @@ void INIT_ATTR sdma_init(void)
561 set_buffer_descriptor(&c0_buffer_desc.bd, 484 set_buffer_descriptor(&c0_buffer_desc.bd,
562 C0_SETPM, 485 C0_SETPM,
563 BD_DONE | BD_WRAP | BD_EXTD, 486 BD_DONE | BD_WRAP | BD_EXTD,
564 script_info.ram_code_size, 487 RAM_CODE_SIZE,
565 (void *)addr_virt_to_phys(script_info.mcu_start_addr), 488 (void *)addr_virt_to_phys(MCU_START_ADDR),
566 (void *)(unsigned long)script_info.ram_code_start_addr); 489 (void *)RAM_CODE_START_ADDR);
567 490
568 SDMA_HSTART = 1ul; 491 SDMA_HSTART = 1ul;
569 sdma_channel_wait_nonblocking(0); 492 sdma_channel_wait_nonblocking(0);
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-17 21:47:44 +0000