diff options
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/system-gigabeat-s.c')
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/system-gigabeat-s.c | 43 |
1 files changed, 35 insertions, 8 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/system-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/system-gigabeat-s.c index cd684e77ac..7c0d30c783 100644 --- a/firmware/target/arm/imx31/gigabeat-s/system-gigabeat-s.c +++ b/firmware/target/arm/imx31/gigabeat-s/system-gigabeat-s.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include "gpio-imx31.h" | 26 | #include "gpio-imx31.h" |
27 | #include "mmu-imx31.h" | 27 | #include "mmu-imx31.h" |
28 | #include "system-target.h" | 28 | #include "system-target.h" |
29 | #include "powermgmt-target.h" | ||
29 | #include "lcd.h" | 30 | #include "lcd.h" |
30 | #include "serial-imx31.h" | 31 | #include "serial-imx31.h" |
31 | #include "debug.h" | 32 | #include "debug.h" |
@@ -115,18 +116,24 @@ int system_memory_guard(int newmode) | |||
115 | return 0; | 116 | return 0; |
116 | } | 117 | } |
117 | 118 | ||
119 | void system_halt(void) | ||
120 | { | ||
121 | disable_interrupt(IRQ_FIQ_STATUS); | ||
122 | avic_set_ni_level(AVIC_NIL_DISABLE); | ||
123 | while (1) | ||
124 | core_idle(); | ||
125 | } | ||
126 | |||
118 | void system_reboot(void) | 127 | void system_reboot(void) |
119 | { | 128 | { |
120 | /* Multi-context so no SPI available (WDT?) */ | 129 | /* Multi-context so no SPI available (WDT?) */ |
121 | while (1); | 130 | system_halt(); |
122 | } | 131 | } |
123 | 132 | ||
124 | void system_exception_wait(void) | 133 | void system_exception_wait(void) |
125 | { | 134 | { |
126 | /* Called in many contexts so button reading may be a chore */ | 135 | /* Called in many contexts so button reading may be a chore */ |
127 | avic_disable_int(INT_ALL); | 136 | system_halt(); |
128 | core_idle(); | ||
129 | while (1); | ||
130 | } | 137 | } |
131 | 138 | ||
132 | void system_init(void) | 139 | void system_init(void) |
@@ -175,6 +182,9 @@ void system_init(void) | |||
175 | 182 | ||
176 | unsigned int i; | 183 | unsigned int i; |
177 | 184 | ||
185 | /* Initialize frequency with current */ | ||
186 | cpu_frequency = ccm_get_mcu_clk(); | ||
187 | |||
178 | /* MCR WFI enables wait mode (CCM_CCMR_LPM_WAIT_MODE = 0) */ | 188 | /* MCR WFI enables wait mode (CCM_CCMR_LPM_WAIT_MODE = 0) */ |
179 | imx31_regclr32(&CCM_CCMR, CCM_CCMR_LPM); | 189 | imx31_regclr32(&CCM_CCMR, CCM_CCMR_LPM); |
180 | 190 | ||
@@ -239,16 +249,33 @@ void __attribute__((naked)) imx31_regclr32(volatile uint32_t *reg_p, | |||
239 | (void)reg_p; (void)mask; | 249 | (void)reg_p; (void)mask; |
240 | } | 250 | } |
241 | 251 | ||
242 | #ifdef BOOTLOADER | 252 | |
243 | void system_prepare_fw_start(void) | 253 | void system_prepare_fw_start(void) |
244 | { | 254 | { |
245 | dvfs_dptc_stop(); | 255 | dvfs_dptc_stop(); |
246 | disable_interrupt(IRQ_FIQ_STATUS); | ||
247 | avic_disable_int(INT_ALL); | ||
248 | mc13783_close(); | 256 | mc13783_close(); |
249 | tick_stop(); | 257 | tick_stop(); |
258 | disable_interrupt(IRQ_FIQ_STATUS); | ||
259 | avic_set_ni_level(AVIC_NIL_DISABLE); | ||
250 | } | 260 | } |
251 | #endif | 261 | |
262 | |||
263 | #ifndef BOOTLOADER | ||
264 | void rolo_restart_firmware(const unsigned char *source, unsigned char *dest, | ||
265 | int length) __attribute__((noreturn)); | ||
266 | |||
267 | void __attribute__((noreturn)) | ||
268 | rolo_restart(const unsigned char *source, unsigned char *dest, int length) | ||
269 | { | ||
270 | /* Some housekeeping tasks must be performed for a safe changeover */ | ||
271 | charging_algorithm_close(); | ||
272 | system_prepare_fw_start(); | ||
273 | |||
274 | /* Copying routine where new image is run */ | ||
275 | rolo_restart_firmware(source, dest, length); | ||
276 | } | ||
277 | #endif /* BOOTLOADER */ | ||
278 | |||
252 | 279 | ||
253 | inline void dumpregs(void) | 280 | inline void dumpregs(void) |
254 | { | 281 | { |