1 files changed, 45 insertions, 10 deletions

diff --git a/firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c b/firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c
index 9df90a2344..7f882405a5 100644
--- a/firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/kernel-imx31.c
@@ -1,25 +1,60 @@
+#include "config.h"
+#include "system.h"
+#include "avic-imx31.h"
 #include "kernel.h"
 #include "thread.h"
-
 #include <stdio.h>
-#include "lcd.h"
 
 extern void (*tick_funcs[MAX_NUM_TICK_TASKS])(void);
 
-void timer4(void) {
-        int i;
+#ifndef BOOTLOADER
+static __attribute__((interrupt("IRQ"))) void EPIT1_HANDLER(void)
+{
+    int i;
+
+    EPITSR1 = 1; /* Clear the pending status */
+
     /* Run through the list of tick tasks */
-    for(i = 0; i < MAX_NUM_TICK_TASKS; i++)
+    for(i = 0;i < MAX_NUM_TICK_TASKS;i++)
     {
         if(tick_funcs[i])
-        {
             tick_funcs[i]();
-        }
     }
 
     current_tick++;
-
-    /* following needs to be fixed.  */
-    /*wake_up_thread();*/
 }
+#endif
+
+void tick_start(unsigned int interval_in_ms)
+{
+    EPITCR1 &= ~(1 << 0);        /* Disable the counter */
+    EPITCR1 |= (1 << 16);        /* Reset */
 
+    CLKCTL_CGR0 |= (0x3 << 6);   /* Clock ON */
+    CLKCTL_WIMR0 &= ~(1 << 23);  /* Clear wakeup mask */
+
+    /* NOTE: This isn't really accurate yet but it's close enough to work
+     * with for the moment */
+
+    /* CLKSRC=32KHz, EPIT Output Disconnected, Enabled
+     * prescale 1/32, Reload from modulus register, Compare interrupt enabled,
+     * Count from load value */
+    EPITCR1 = (0x3 << 24) | (1 << 19) | (32 << 4) |
+              (1 << 3) | (1 << 2) | (1 << 1);
+    EPITSR1 = 1;                /* Clear any pending interrupt */
+#ifndef BOOTLOADER
+    EPITLR1 = interval_in_ms;
+    EPITCMPR1 = 0;              /* Event when counter reaches 0 */
+    avic_enable_int(EPIT1, IRQ, EPIT1_HANDLER);
+#else
+    (void)interval_in_ms;
+#endif
+
+    EPITCR1 |= (1 << 0);        /* Enable the counter */
+
+    /* Why does only this trigger the counter? Remove when we find out. */
+    asm volatile (
+        "mcr p15, 0, %0, c7, c0, 4 \n"
+        : : "r" (0)
+    );
+}