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Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/fmradio-i2c-gigabeat-s.c')
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/fmradio-i2c-gigabeat-s.c43
1 files changed, 21 insertions, 22 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/fmradio-i2c-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/fmradio-i2c-gigabeat-s.c
index d846f4d1d0..f720921fad 100644
--- a/firmware/target/arm/imx31/gigabeat-s/fmradio-i2c-gigabeat-s.c
+++ b/firmware/target/arm/imx31/gigabeat-s/fmradio-i2c-gigabeat-s.c
@@ -22,6 +22,7 @@
22#include "config.h" 22#include "config.h"
23#include "system.h" 23#include "system.h"
24#include "mc13783.h" 24#include "mc13783.h"
25#include "iomuxc-imx31.h"
25#include "i2c-imx31.h" 26#include "i2c-imx31.h"
26#include "fmradio_i2c.h" 27#include "fmradio_i2c.h"
27 28
@@ -48,36 +49,34 @@ void fmradio_i2c_init(void)
48 49
49 /* open-drain pins - external pullups on PCB. Pullup default but 50 /* open-drain pins - external pullups on PCB. Pullup default but
50 * disabled */ 51 * disabled */
51 imx31_regmod32(&SW_PAD_CTL_DSR_DTE1_RI_DTE1_DCD_DTE1, 52 /* RI_DTE1 (I2C2_SCLK) */
52 /* RI_DTE1 (I2C2_SCLK) */ 53 iomuxc_set_pad_config(IOMUXC_RI_DTE1,
53 ((SW_PAD_CTL_PUE_PKE_DISABLE | SW_PAD_CTL_PUS_UP_100K | 54 IOMUXC_PAD_PUE_PKE_DISABLE | IOMUXC_PAD_PUS_UP_100K |
54 SW_PAD_CTL_HYS | SW_PAD_CTL_ODE) << SW_PAD_CTL_IO2_POS) | 55 IOMUXC_PAD_HYS | IOMUXC_PAD_ODE);
55 /* DCD_DTE1 (I2C2_SDA) */ 56 /* DCD_DTE1 (I2C2_SDA) */
56 ((SW_PAD_CTL_PUE_PKE_DISABLE | SW_PAD_CTL_PUS_UP_100K | 57 iomuxc_set_pad_config(IOMUXC_DCD_DTE1,
57 SW_PAD_CTL_HYS | SW_PAD_CTL_ODE) << SW_PAD_CTL_IO1_POS), 58 IOMUXC_PAD_PUE_PKE_DISABLE | IOMUXC_PAD_PUS_UP_100K |
58 SW_PAD_CTL_IO2 | SW_PAD_CTL_IO1); 59 IOMUXC_PAD_HYS | IOMUXC_PAD_ODE);
60
59 /* set outputs to I2C2 */ 61 /* set outputs to I2C2 */
60 imx31_regmod32(&SW_MUX_CTL_RI_DTE1_DCD_DTE1_DTR_DCE2_RXD2, 62 /* RI_DTE1 => I2C2_SCLK */
61 /* RI_DTE1 => I2C2_SCLK */ 63 iomuxc_set_pin_mux(IOMUXC_RI_DTE1,
62 ((SW_MUX_OUT_ALT2 | SW_MUX_IN_ALT2) << SW_MUX_CTL_SIG4_POS) | 64 IOMUXC_MUX_OUT_ALT2 | IOMUXC_MUX_IN_ALT2);
63 /* DCD_DTE1 => I2C2_SDA */ 65 /* DCD_DTE1 => I2C2_SDA */
64 ((SW_MUX_OUT_ALT2 | SW_MUX_IN_ALT2) << SW_MUX_CTL_SIG3_POS), 66 iomuxc_set_pin_mux(IOMUXC_DCD_DTE1,
65 SW_MUX_CTL_SIG4 | SW_MUX_CTL_SIG3); 67 IOMUXC_MUX_OUT_ALT2 | IOMUXC_MUX_IN_ALT2);
66} 68}
67 69
68void fmradio_i2c_enable(bool enable) 70void fmradio_i2c_enable(bool enable)
69{ 71{
70 if (enable) 72 if (enable)
71 { 73 {
72 uint32_t io_pin_mux = SW_MUX_CTL_RI_DTE1_DCD_DTE1_DTR_DCE2_RXD2;
73 /* place in GPIO mode to hold SDIO low during RESET release, 74 /* place in GPIO mode to hold SDIO low during RESET release,
74 * SEN1 should be high already (pullup) and GPIO3 left alone */ 75 * SEN1 should be high already (pullup) and GPIO3 left alone */
75 imx31_regset32(&GPIO2_GDIR, (1 << 15)); /* SDIO OUT */ 76 imx31_regset32(&GPIO2_GDIR, (1 << 15)); /* SDIO OUT */
76 /* I2C2_SDA => MCU2_15 */ 77 /* I2C2_SDA => MCU2_15 */
77 imx31_regmod32(&SW_MUX_CTL_RI_DTE1_DCD_DTE1_DTR_DCE2_RXD2, 78 iomuxc_set_pin_mux(IOMUXC_DCD_DTE1,
78 (SW_MUX_OUT_GPIO_DR | 79 IOMUXC_MUX_OUT_GPIO | IOMUXC_MUX_IN_GPIO);
79 SW_MUX_IN_GPIO_PSR_ISR) << SW_MUX_CTL_SIG3_POS,
80 SW_MUX_CTL_SIG3);
81 /* enable CLK32KMCU clock */ 80 /* enable CLK32KMCU clock */
82 mc13783_set(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN); 81 mc13783_set(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
83 /* enable the fm chip (release RESET) */ 82 /* enable the fm chip (release RESET) */
@@ -85,9 +84,9 @@ void fmradio_i2c_enable(bool enable)
85 sleep(HZ/100); 84 sleep(HZ/100);
86 /* busmode should be selected - OK to release SDIO */ 85 /* busmode should be selected - OK to release SDIO */
87 imx31_regclr32(&GPIO2_GDIR, (1 << 15)); /* SDIO IN */ 86 imx31_regclr32(&GPIO2_GDIR, (1 << 15)); /* SDIO IN */
88 /* restore pin mux (DCD_DTE1 => I2C2_SDA) */ 87 /* restore pin mux (MCU2_15 => I2C2_SDA) */
89 imx31_regmod32(&SW_MUX_CTL_RI_DTE1_DCD_DTE1_DTR_DCE2_RXD2, 88 iomuxc_set_pin_mux(IOMUXC_DCD_DTE1,
90 io_pin_mux, SW_MUX_CTL_SIG3); 89 IOMUXC_MUX_OUT_ALT2 | IOMUXC_MUX_IN_ALT2);
91 /* the si4700 is the only thing connected to i2c2 so 90 /* the si4700 is the only thing connected to i2c2 so
92 we can diable the i2c module when not in use */ 91 we can diable the i2c module when not in use */
93 i2c_enable_node(&si4700_i2c_node, true); 92 i2c_enable_node(&si4700_i2c_node, true);