1 files changed, 125 insertions, 0 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/avic-imx31.h b/firmware/target/arm/imx31/gigabeat-s/avic-imx31.h
new file mode 100644
index 0000000000..53a37b353b
--- /dev/null
+++ b/firmware/target/arm/imx31/gigabeat-s/avic-imx31.h
@@ -0,0 +1,125 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2007 by James Espinoza
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef AVIC_IMX31_H
+#define AVIC_IMX31_H
+enum INT_TYPE {IRQ=0,FIQ};
+struct int_names {
+        char name[16];
+};
+static const struct int_names imx31_int_names[64] =
+{  {"RESERVED0"},
+   {"RESERVED1"},
+   {"RESERVED2"},
+   {"I2C3"},
+   {"I2C2"},
+   {"MPEG4_ENCODER"},
+   {"RTIC"},
+   {"FIR"},
+   {"MMC/SDHC2"},
+   {"MMC/SDHC1"},
+   {"I2C1"},
+   {"SSI2"},
+   {"SSI1"},
+   {"CSPI2"},
+   {"CSPI1"},
+   {"ATA"},
+   {"MBX"},
+   {"CSPI3"},
+   {"UART3"},
+   {"IIM"},
+   {"SIM1"},
+   {"SIM2"},
+   {"RNGA"},
+   {"EVTMON"},
+   {"KPP"},
+   {"RTC"},
+   {"PWN"},
+   {"EPIT2"},
+   {"EPIT1"},
+   {"GPT"},
+   {"PWR_FAIL"},
+   {"CCM_DVFS"},
+   {"UART2"},
+   {"NANDFC"},
+   {"SDMA"},
+   {"USB_HOST1"},
+   {"USB_HOST2"},
+   {"USB_OTG"},
+   {"RESERVED3"},
+   {"MSHC1"},
+   {"MSHC2"},
+   {"IPU_ERR"},
+   {"IPU"},
+   {"RESERVED4"},
+   {"RESERVED5"},
+   {"UART1"},
+   {"UART4"},
+   {"UART5"},
+   {"ETC_IRQ"},
+   {"SCC_SCM"},
+   {"SCC_SMN"},
+   {"GPIO2"},
+   {"GPIO1"},
+   {"CCM_CLK"},
+   {"PCMCIA"},
+   {"WDOG"},
+   {"GPIO3"},
+   {"RESERVED6"},             
+   {"EXT_PWMG"},
+   {"EXT_TEMP"},
+   {"EXT_SENS1"},
+   {"EXT_SENS2"},
+   {"EXT_WDOG"},
+   {"EXT_TV"} };
+enum IMX31_INT_LIST {
+   RESERVED0 = 0,RESERVED1,RESERVED2,I2C3,
+   I2C2,MPEG4_ENCODER,RTIC,FIR,MMC_SDHC2,
+   MMC_SDHC1,I2C1,SSI2,SSI1,CSPI2,CSPI1,
+   ATA,MBX,CSPI3,UART3,IIM,SIM1,SIM2,
+   RNGA,EVTMON,KPP,RTC,PWN,EPIT2,EPIT1,
+   GPT,PWR_FAIL,CCM_DVFS,UART2,NANDFC,
+   SDMA,USB_HOST1,USB_HOST2,USB_OTG,
+   RESERVED3,MSHC1,MSHC2,IPU_ERR,IPU,
+   RESERVED4,RESERVED5,UART1,UART4,UART5,
+   ETC_IRQ,SCC_SCM,SCC_SMN,GPIO2,GPIO1,
+   CCM_CLK,PCMCIA,WDOG,GPIO3,RESERVED6,    
+   EXT_PWMG,EXT_TEMP,EXT_SENS1,EXT_SENS2,
+   EXT_WDOG,EXT_TV,ALL };
+static struct avic_int {
+        char * name;
+        enum INT_TYPE int_type;
+        unsigned int addr;
+        unsigned int priority;
+        void (*pInt_Handler) (void);
+} imx31_int[64];
+void avic_init(void);
+void avic_enable_int(enum IMX31_INT_LIST ints, enum INT_TYPE intstype,
+                                         void (*pInt_Handler) (void));
+void avic_disable_int(enum IMX31_INT_LIST ints) ;
+void avic_set_int_type(enum IMX31_INT_LIST ints, enum INT_TYPE intstype);
+void Unhandled_Int(void);
+void vector_init(void) __attribute__ ((section(".avic_int"),naked));
+#endif

diff --git a/firmware/target/arm/imx31/gigabeat-s/avic-imx31.h b/firmware/target/arm/imx31/gigabeat-s/avic-imx31.h new file mode 100644 index 0000000000..53a37b353b --- /dev/null +++ b/firmware/target/arm/imx31/gigabeat-s/avic-imx31.h
@@ -0,0 +1,125 @@
	1	/***************************************************************************
	2	* __________ __ ___.
	3	* Open \______ \ ____ ____ \| \| _\_ \|__ _______ ___
	4	* Source \| _// _ \_/ ___\\| \|/ /\| __ \ / _ \ \/ /
	5	* Jukebox \| \| ( <_> ) \___\| < \| \_\ ( <_> > < <
	6	* Firmware \|____\|_ /\____/ \___ >__\|_ \\|___ /\____/__/\_ \
	7	* \/ \/ \/ \/ \/
	8	* $Id$
	9	*
	10	* Copyright (C) 2007 by James Espinoza
	11	*
	12	* All files in this archive are subject to the GNU General Public License.
	13	* See the file COPYING in the source tree root for full license agreement.
	14	*
	15	* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
	16	* KIND, either express or implied.
	17	*
	18	****************************************************************************/
	19	#ifndef AVIC_IMX31_H
	20	#define AVIC_IMX31_H
	21
	22
	23	enum INT_TYPE {IRQ=0,FIQ};
	24
	25	struct int_names {
	26	char name[16];
	27	};
	28
	29	static const struct int_names imx31_int_names[64] =
	30	{ {"RESERVED0"},
	31	{"RESERVED1"},
	32	{"RESERVED2"},
	33	{"I2C3"},
	34	{"I2C2"},
	35	{"MPEG4_ENCODER"},
	36	{"RTIC"},
	37	{"FIR"},
	38	{"MMC/SDHC2"},
	39	{"MMC/SDHC1"},
	40	{"I2C1"},
	41	{"SSI2"},
	42	{"SSI1"},
	43	{"CSPI2"},
	44	{"CSPI1"},
	45	{"ATA"},
	46	{"MBX"},
	47	{"CSPI3"},
	48	{"UART3"},
	49	{"IIM"},
	50	{"SIM1"},
	51	{"SIM2"},
	52	{"RNGA"},
	53	{"EVTMON"},
	54	{"KPP"},
	55	{"RTC"},
	56	{"PWN"},
	57	{"EPIT2"},
	58	{"EPIT1"},
	59	{"GPT"},
	60	{"PWR_FAIL"},
	61	{"CCM_DVFS"},
	62	{"UART2"},
	63	{"NANDFC"},
	64	{"SDMA"},
	65	{"USB_HOST1"},
	66	{"USB_HOST2"},
	67	{"USB_OTG"},
	68	{"RESERVED3"},
	69	{"MSHC1"},
	70	{"MSHC2"},
	71	{"IPU_ERR"},
	72	{"IPU"},
	73	{"RESERVED4"},
	74	{"RESERVED5"},
	75	{"UART1"},
	76	{"UART4"},
	77	{"UART5"},
	78	{"ETC_IRQ"},
	79	{"SCC_SCM"},
	80	{"SCC_SMN"},
	81	{"GPIO2"},
	82	{"GPIO1"},
	83	{"CCM_CLK"},
	84	{"PCMCIA"},
	85	{"WDOG"},
	86	{"GPIO3"},
	87	{"RESERVED6"},
	88	{"EXT_PWMG"},
	89	{"EXT_TEMP"},
	90	{"EXT_SENS1"},
	91	{"EXT_SENS2"},
	92	{"EXT_WDOG"},
	93	{"EXT_TV"} };
	94
	95	enum IMX31_INT_LIST {
	96	RESERVED0 = 0,RESERVED1,RESERVED2,I2C3,
	97	I2C2,MPEG4_ENCODER,RTIC,FIR,MMC_SDHC2,
	98	MMC_SDHC1,I2C1,SSI2,SSI1,CSPI2,CSPI1,
	99	ATA,MBX,CSPI3,UART3,IIM,SIM1,SIM2,
	100	RNGA,EVTMON,KPP,RTC,PWN,EPIT2,EPIT1,
	101	GPT,PWR_FAIL,CCM_DVFS,UART2,NANDFC,
	102	SDMA,USB_HOST1,USB_HOST2,USB_OTG,
	103	RESERVED3,MSHC1,MSHC2,IPU_ERR,IPU,
	104	RESERVED4,RESERVED5,UART1,UART4,UART5,
	105	ETC_IRQ,SCC_SCM,SCC_SMN,GPIO2,GPIO1,
	106	CCM_CLK,PCMCIA,WDOG,GPIO3,RESERVED6,
	107	EXT_PWMG,EXT_TEMP,EXT_SENS1,EXT_SENS2,
	108	EXT_WDOG,EXT_TV,ALL };
	109
	110	static struct avic_int {
	111	char * name;
	112	enum INT_TYPE int_type;
	113	unsigned int addr;
	114	unsigned int priority;
	115	void (*pInt_Handler) (void);
	116	} imx31_int[64];
	117
	118	void avic_init(void);
	119	void avic_enable_int(enum IMX31_INT_LIST ints, enum INT_TYPE intstype,
	120	void (*pInt_Handler) (void));
	121	void avic_disable_int(enum IMX31_INT_LIST ints) ;
	122	void avic_set_int_type(enum IMX31_INT_LIST ints, enum INT_TYPE intstype);
	123	void Unhandled_Int(void);
	124	void vector_init(void) __attribute__ ((section(".avic_int"),naked));
	125	#endif