diff options
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/avic-imx31.c')
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/avic-imx31.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/avic-imx31.c b/firmware/target/arm/imx31/gigabeat-s/avic-imx31.c index 426657321f..fa74d3bb9f 100644 --- a/firmware/target/arm/imx31/gigabeat-s/avic-imx31.c +++ b/firmware/target/arm/imx31/gigabeat-s/avic-imx31.c | |||
@@ -45,22 +45,28 @@ static const char * avic_int_names[64] = | |||
45 | 45 | ||
46 | static void UIE_VECTOR(void) | 46 | static void UIE_VECTOR(void) |
47 | { | 47 | { |
48 | set_interrupt_status(IRQ_FIQ_DISABLED, IRQ_FIQ_STATUS); | 48 | int mode; |
49 | long offset = FIVECSR; | 49 | long offset; |
50 | long offsetn = (long)NIVECSR >> 16; | ||
51 | 50 | ||
52 | if (offsetn == -1) | 51 | asm volatile ( |
53 | offset = offsetn; /* Could be FIQ */ | 52 | "mrs %0, cpsr \n" /* Mask core IRQ/FIQ */ |
53 | "orr %0, %0, #0xc0 \n" | ||
54 | "msr cpsr_c, %0 \n" | ||
55 | "and %0, %0, #0x1f \n" /* Get mode bits */ | ||
56 | : "=&r"(mode) | ||
57 | ); | ||
58 | |||
59 | offset = mode == 0x11 ? (long)FIVECSR : ((long)NIVECSR >> 16); | ||
54 | 60 | ||
55 | panicf("Unhandled %s %ld: %s", | 61 | panicf("Unhandled %s %ld: %s", |
56 | offsetn >= 0 ? "IRQ" : "FIQ", offset, | 62 | mode == 0x11 ? "FIQ" : "IRQ", offset, |
57 | offset >= 0 ? avic_int_names[offset] : ""); | 63 | offset >= 0 ? avic_int_names[offset] : "<Unknown>"); |
58 | } | 64 | } |
59 | 65 | ||
60 | /* We use the AVIC */ | 66 | /* We use the AVIC */ |
61 | void __attribute__((naked)) irq_handler(void) | 67 | void __attribute__((naked)) irq_handler(void) |
62 | { | 68 | { |
63 | panicf("Unhandled IRQ"); | 69 | panicf("Unhandled IRQ in irq_handler"); |
64 | } | 70 | } |
65 | 71 | ||
66 | /* Accoring to section 9.3.5 of the UM, the AVIC doesn't accelerate | 72 | /* Accoring to section 9.3.5 of the UM, the AVIC doesn't accelerate |