diff options
Diffstat (limited to 'firmware/target/arm/imx31/dvfs_dptc-imx31.h')
-rw-r--r-- | firmware/target/arm/imx31/dvfs_dptc-imx31.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/firmware/target/arm/imx31/dvfs_dptc-imx31.h b/firmware/target/arm/imx31/dvfs_dptc-imx31.h index 2bf6114a11..844fd6ebff 100644 --- a/firmware/target/arm/imx31/dvfs_dptc-imx31.h +++ b/firmware/target/arm/imx31/dvfs_dptc-imx31.h | |||
@@ -107,6 +107,16 @@ struct dvfs_lt_signal_descriptor | |||
107 | uint8_t detect : 1; /* 1 = edge-detected */ | 107 | uint8_t detect : 1; /* 1 = edge-detected */ |
108 | }; | 108 | }; |
109 | 109 | ||
110 | #define DVFS_NUM_LEVELS 4 | ||
111 | #define DPTC_NUM_WP 17 | ||
112 | |||
113 | /* 0 and 3 are *required*. DVFS hardware depends upon DVSUP pins showing | ||
114 | * minimum (11) and maximum (00) levels or interrupts will be continuously | ||
115 | * asserted. */ | ||
116 | #define DVFS_LEVEL_0 (1u << 0) | ||
117 | #define DVFS_LEVEL_1 (1u << 1) | ||
118 | #define DVFS_LEVEL_2 (1u << 2) | ||
119 | #define DVFS_LEVEL_3 (1u << 3) | ||
110 | 120 | ||
111 | extern long cpu_voltage_setting; | 121 | extern long cpu_voltage_setting; |
112 | 122 | ||