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Diffstat (limited to 'firmware/target/arm/imx31/debug-imx31.c')
-rw-r--r--firmware/target/arm/imx31/debug-imx31.c35
1 files changed, 5 insertions, 30 deletions
diff --git a/firmware/target/arm/imx31/debug-imx31.c b/firmware/target/arm/imx31/debug-imx31.c
index 9fe2eae584..614a703836 100644
--- a/firmware/target/arm/imx31/debug-imx31.c
+++ b/firmware/target/arm/imx31/debug-imx31.c
@@ -26,32 +26,7 @@
26#include "debug-target.h" 26#include "debug-target.h"
27#include "mc13783.h" 27#include "mc13783.h"
28#include "adc.h" 28#include "adc.h"
29 29#include "clkctl-imx31.h"
30#define CONFIG_CLK32_FREQ 32768
31#define CONFIG_HCLK_FREQ 27000000
32
33/* Return PLL frequency in HZ */
34static unsigned int decode_pll(unsigned int reg,
35 unsigned int infreq)
36{
37 uint64_t mfi = (reg >> 10) & 0xf;
38 uint64_t mfn = reg & 0x3ff;
39 uint64_t mfd = ((reg >> 16) & 0x3ff) + 1;
40 uint64_t pd = ((reg >> 26) & 0xf) + 1;
41
42 mfi = mfi <= 5 ? 5 : mfi;
43
44 return 2*infreq*(mfi * mfd + mfn) / (mfd * pd);
45}
46
47/* Get the PLL reference clock frequency */
48static unsigned int get_pll_ref_clk_freq(void)
49{
50 if ((CLKCTL_CCMR & (3 << 1)) == (1 << 1))
51 return CONFIG_CLK32_FREQ * 1024;
52 else
53 return CONFIG_HCLK_FREQ;
54}
55 30
56bool __dbg_hw_info(void) 31bool __dbg_hw_info(void)
57{ 32{
@@ -74,11 +49,11 @@ bool __dbg_hw_info(void)
74 spctl = CLKCTL_SPCTL; 49 spctl = CLKCTL_SPCTL;
75 upctl = CLKCTL_UPCTL; 50 upctl = CLKCTL_UPCTL;
76 51
77 pllref = get_pll_ref_clk_freq(); 52 pllref = imx31_clkctl_get_pll_ref_clk();
78 53
79 mcu_pllfreq = decode_pll(mpctl, pllref); 54 mcu_pllfreq = imx31_clkctl_get_pll(PLL_MCU);
80 ser_pllfreq = decode_pll(spctl, pllref); 55 ser_pllfreq = imx31_clkctl_get_pll(PLL_SERIAL);
81 usb_pllfreq = decode_pll(upctl, pllref); 56 usb_pllfreq = imx31_clkctl_get_pll(PLL_USB);
82 57
83 snprintf(buf, sizeof (buf), "pll_ref_clk: %u", pllref); 58 snprintf(buf, sizeof (buf), "pll_ref_clk: %u", pllref);
84 lcd_puts(0, line++, buf); line++; 59 lcd_puts(0, line++, buf); line++;