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Diffstat (limited to 'firmware/target/arm/imx31/crt0.S')
-rw-r--r--firmware/target/arm/imx31/crt0.S18
1 files changed, 8 insertions, 10 deletions
diff --git a/firmware/target/arm/imx31/crt0.S b/firmware/target/arm/imx31/crt0.S
index d51de7215a..7118c7572f 100644
--- a/firmware/target/arm/imx31/crt0.S
+++ b/firmware/target/arm/imx31/crt0.S
@@ -43,21 +43,19 @@ start:
43 * 43 *
44 */ 44 */
45 45
46/* Initially this code is running at VA 0x8a000000 (PA 0x82000000). 46/* Bootloader:
47 * The mapping stub is copied to IRAM (0x1fffc000) and jumps to the final 47 * Initially this code is running at VA 0x8a000000 (PA 0x82000000).
48 * VA remapping starting at 0x01f00000 because the 1MB section containing 48 * The mapping stub is copied to IRAM (0x1fffc000), sets up the MMU and
49 * the framebuffer at PA 0x81000000 is skipped in the remapping giving 63MB 49 * jumps into the final VA remapping starting at 0x02000000 (32MB).
50 * of contiguous RAM for the firmware. The TTB is placed at the end of said
51 * section.
52 * 50 *
53 * For now this will be done in bootloader, especially if usb will be needed 51 * Firmware:
54 * within the bootloader to load the main firmware file. Interrupts will be 52 * This code will be running from VA 0x00000000 (PA 0x80000000) and perform
55 * needed for this (whether they be swi or irq). 53 * similar steps to the bootloader code.
56 */ 54 */
57newstart: 55newstart:
58 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ 56 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
59 57
60 adr r2, remap_start /* Load PC-relative labels */ 58 adr r2, remap_start /* Load PC-relative labels (relocatable) */
61 adr r3, remap_end 59 adr r3, remap_end
62 ldr r5, =TTB_BASE_ADDR /* TTB pointer */ 60 ldr r5, =TTB_BASE_ADDR /* TTB pointer */
63 ldr r6, =IRAM_BASE_ADDR 61 ldr r6, =IRAM_BASE_ADDR