diff options
Diffstat (limited to 'firmware/target/arm/imx31/crt0.S')
-rw-r--r-- | firmware/target/arm/imx31/crt0.S | 25 |
1 files changed, 6 insertions, 19 deletions
diff --git a/firmware/target/arm/imx31/crt0.S b/firmware/target/arm/imx31/crt0.S index c3bba824dc..8459753f87 100644 --- a/firmware/target/arm/imx31/crt0.S +++ b/firmware/target/arm/imx31/crt0.S | |||
@@ -57,7 +57,6 @@ start: | |||
57 | newstart: | 57 | newstart: |
58 | msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ | 58 | msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ |
59 | 59 | ||
60 | #ifdef BOOTLOADER | ||
61 | adr r2, remap_start /* Load PC-relative labels */ | 60 | adr r2, remap_start /* Load PC-relative labels */ |
62 | adr r3, remap_end | 61 | adr r3, remap_end |
63 | ldr r5, =TTB_BASE_ADDR /* TTB pointer */ | 62 | ldr r5, =TTB_BASE_ADDR /* TTB pointer */ |
@@ -127,13 +126,6 @@ remap_start: | |||
127 | /*** End of L2 operations ***/ | 126 | /*** End of L2 operations ***/ |
128 | 127 | ||
129 | /* TTB Initialisation */ | 128 | /* TTB Initialisation */ |
130 | mov r2, r5 | ||
131 | add r3, r5, #TTB_SIZE | ||
132 | mov r1, #0 | ||
133 | 1: | ||
134 | str r1, [r2], #4 | ||
135 | cmp r2, r3 | ||
136 | blo 1b | ||
137 | 129 | ||
138 | /* Set TTB base address */ | 130 | /* Set TTB base address */ |
139 | mcr p15, 0, r5, c2, c0, 0 | 131 | mcr p15, 0, r5, c2, c0, 0 |
@@ -157,32 +149,29 @@ remap_start: | |||
157 | add r1, r1, #(1 << 20) /* Next MB */ | 149 | add r1, r1, #(1 << 20) /* Next MB */ |
158 | cmp r2, r3 | 150 | cmp r2, r3 |
159 | blo 1b | 151 | blo 1b |
160 | sub r1, r1, #TTB_SIZE/4*(1 << 20) /* Back up */ | 152 | |
153 | bic r1, r1, #0x0ff00000 /* Back up */ | ||
161 | 154 | ||
162 | /* Map 0x80000000 -> 0x0, cached */ | 155 | /* Map 0x80000000 -> 0x0, cached */ |
163 | mov r2, r5 /* TTB pointer */ | 156 | mov r2, r5 /* TTB pointer */ |
164 | add r3, r5, #63*4 /* End position */ | 157 | add r3, r5, #64*4 /* End position */ |
165 | orr r1, r1, #0x80000000 /* Physical address */ | 158 | orr r1, r1, #0x80000000 /* Physical address */ |
166 | orr r1, r1, #((1 << 3) | /* cache flag */ \ | 159 | orr r1, r1, #((1 << 3) | /* cache flag */ \ |
167 | (1 << 2)) /* buffer flag */ | 160 | (1 << 2)) /* buffer flag */ |
168 | 1: | 161 | 1: |
169 | str r1, [r2], #4 | 162 | str r1, [r2], #4 |
170 | add r1, r1, #(1 << 20) | 163 | add r1, r1, #(1 << 20) |
171 | and r4, r1, #0x0ff00000 | ||
172 | cmp r4, #0x00100000 /* Skip framebuffer */ | ||
173 | addeq r1, r1, #(1 << 20) | ||
174 | cmp r2, r3 | 164 | cmp r2, r3 |
175 | blo 1b | 165 | blo 1b |
176 | 166 | ||
177 | /* Map device section 0x80100000 to 0x03f00000 - buffered, not cached */ | 167 | /* Map device section 0x83f00000 to 0x03f00000 - buffered, not cached */ |
178 | bic r1, r1, #0x0ff00000 | 168 | bic r1, r1, #0x0ff00000 |
179 | orr r1, r1, #0x00100000 | 169 | orr r1, r1, #0x03f00000 |
180 | bic r1, r1, #(1 << 3) | 170 | bic r1, r1, #(1 << 3) |
181 | add r2, r5, #63*4 | 171 | add r2, r5, #63*4 |
182 | str r1, [r2] | 172 | str r1, [r2] |
183 | 173 | ||
184 | /* Enable MMU */ | 174 | /* Enable MMU */ |
185 | |||
186 | mov r0, #0 | 175 | mov r0, #0 |
187 | mcr p15, 0, r0, c8, c7, 0 /* Invalidate TLB */ | 176 | mcr p15, 0, r0, c8, c7, 0 /* Invalidate TLB */ |
188 | mcr p15, 0, r0, c7, c7, 0 /* Invalidate icache and dcache */ | 177 | mcr p15, 0, r0, c7, c7, 0 /* Invalidate icache and dcache */ |
@@ -230,8 +219,6 @@ L_post_remap: | |||
230 | .word remap_end | 219 | .word remap_end |
231 | remap_end: | 220 | remap_end: |
232 | 221 | ||
233 | #endif /* BOOTLOADER */ | ||
234 | |||
235 | #ifdef BOOTLOADER | 222 | #ifdef BOOTLOADER |
236 | /* Copy bootloader exception handler code to address 0 */ | 223 | /* Copy bootloader exception handler code to address 0 */ |
237 | ldr r2, =_vectorsstart | 224 | ldr r2, =_vectorsstart |