diff options
Diffstat (limited to 'firmware/target/arm/imx233')
5 files changed, 40 insertions, 54 deletions
diff --git a/firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c b/firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c index 63b033a8a9..4f5033e3d3 100644 --- a/firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c +++ b/firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c | |||
@@ -66,11 +66,11 @@ static void setup_lcd_pins(bool use_lcdif) | |||
66 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ | 66 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ |
67 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ | 67 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ |
68 | imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ | 68 | imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ |
69 | __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ | 69 | HW_PINCTRL_MUXSELn_CLR(2) = 0xffffffff; /* lcd_d{0-15} */ |
70 | } | 70 | } |
71 | else | 71 | else |
72 | { | 72 | { |
73 | __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ | 73 | HW_PINCTRL_MUXSELn_SET(2) = 0xffffffff; /* lcd_d{0-15} */ |
74 | imx233_enable_gpio_output_mask(1, 0x3ffffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,dotclk,enable,hsync,vsync} */ | 74 | imx233_enable_gpio_output_mask(1, 0x3ffffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,dotclk,enable,hsync,vsync} */ |
75 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ | 75 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ |
76 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ | 76 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ |
diff --git a/firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c b/firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c index 668f1f7c1a..bc669d1a60 100644 --- a/firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c +++ b/firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c | |||
@@ -65,11 +65,11 @@ static void setup_lcd_pins(bool use_lcdif) | |||
65 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ | 65 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ |
66 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ | 66 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ |
67 | imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ | 67 | imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ |
68 | __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ | 68 | HW_PINCTRL_MUXSELn_CLR(2) = 0xffffffff; /* lcd_d{0-15} */ |
69 | } | 69 | } |
70 | else | 70 | else |
71 | { | 71 | { |
72 | __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ | 72 | HW_PINCTRL_MUXSELn_SET(2) = 0xffffffff; /* lcd_d{0-15} */ |
73 | imx233_enable_gpio_output_mask(1, 0x2bfffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,enable,vsync} */ | 73 | imx233_enable_gpio_output_mask(1, 0x2bfffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,enable,vsync} */ |
74 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ | 74 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ |
75 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ | 75 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ |
diff --git a/firmware/target/arm/imx233/pinctrl-imx233.c b/firmware/target/arm/imx233/pinctrl-imx233.c index d667e8d25c..3d8a6cfe54 100644 --- a/firmware/target/arm/imx233/pinctrl-imx233.c +++ b/firmware/target/arm/imx233/pinctrl-imx233.c | |||
@@ -66,7 +66,7 @@ static pin_irq_cb_t pin_cb[3][32]; /* 3 banks, 32 pins/bank */ | |||
66 | 66 | ||
67 | static void INT_GPIO(int bank) | 67 | static void INT_GPIO(int bank) |
68 | { | 68 | { |
69 | uint32_t fire = HW_PINCTRL_IRQSTAT(bank) & HW_PINCTRL_IRQEN(bank); | 69 | uint32_t fire = HW_PINCTRL_IRQSTATn(bank) & HW_PINCTRL_IRQENn(bank); |
70 | for(int pin = 0; pin < 32; pin++) | 70 | for(int pin = 0; pin < 32; pin++) |
71 | if(fire & (1 << pin)) | 71 | if(fire & (1 << pin)) |
72 | { | 72 | { |
@@ -95,22 +95,22 @@ void INT_GPIO2(void) | |||
95 | void imx233_setup_pin_irq(int bank, int pin, bool enable_int, | 95 | void imx233_setup_pin_irq(int bank, int pin, bool enable_int, |
96 | bool level, bool polarity, pin_irq_cb_t cb) | 96 | bool level, bool polarity, pin_irq_cb_t cb) |
97 | { | 97 | { |
98 | __REG_CLR(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin; | 98 | HW_PINCTRL_PIN2IRQn_CLR(bank) = 1 << pin; |
99 | __REG_CLR(HW_PINCTRL_IRQEN(bank)) = 1 << pin; | 99 | HW_PINCTRL_IRQENn_CLR(bank) = 1 << pin; |
100 | __REG_CLR(HW_PINCTRL_IRQSTAT(bank))= 1 << pin; | 100 | HW_PINCTRL_IRQSTATn_CLR(bank) = 1 << pin; |
101 | pin_cb[bank][pin] = cb; | 101 | pin_cb[bank][pin] = cb; |
102 | if(enable_int) | 102 | if(enable_int) |
103 | { | 103 | { |
104 | if(level) | 104 | if(level) |
105 | __REG_SET(HW_PINCTRL_IRQLEVEL(bank)) = 1 << pin; | 105 | HW_PINCTRL_IRQLEVELn_SET(bank) = 1 << pin; |
106 | else | 106 | else |
107 | __REG_CLR(HW_PINCTRL_IRQLEVEL(bank)) = 1 << pin; | 107 | HW_PINCTRL_IRQLEVELn_CLR(bank) = 1 << pin; |
108 | if(polarity) | 108 | if(polarity) |
109 | __REG_SET(HW_PINCTRL_IRQPOL(bank)) = 1 << pin; | 109 | HW_PINCTRL_IRQPOLn_SET(bank) = 1 << pin; |
110 | else | 110 | else |
111 | __REG_CLR(HW_PINCTRL_IRQPOL(bank)) = 1 << pin; | 111 | HW_PINCTRL_IRQPOLn_CLR(bank) = 1 << pin; |
112 | __REG_SET(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin; | 112 | HW_PINCTRL_PIN2IRQn_SET(bank) = 1 << pin; |
113 | __REG_SET(HW_PINCTRL_IRQEN(bank)) = 1 << pin; | 113 | HW_PINCTRL_IRQENn_SET(bank) = 1 << pin; |
114 | imx233_icoll_enable_interrupt(INT_SRC_GPIO(bank), true); | 114 | imx233_icoll_enable_interrupt(INT_SRC_GPIO(bank), true); |
115 | } | 115 | } |
116 | } | 116 | } |
diff --git a/firmware/target/arm/imx233/pinctrl-imx233.h b/firmware/target/arm/imx233/pinctrl-imx233.h index 5b4b9c4cd5..82ed47d57e 100644 --- a/firmware/target/arm/imx233/pinctrl-imx233.h +++ b/firmware/target/arm/imx233/pinctrl-imx233.h | |||
@@ -24,26 +24,12 @@ | |||
24 | #define __PINCTRL_IMX233_H__ | 24 | #define __PINCTRL_IMX233_H__ |
25 | 25 | ||
26 | #include "config.h" | 26 | #include "config.h" |
27 | #include "system.h" | ||
28 | #include "regs/regs-pinctrl.h" | ||
27 | 29 | ||
28 | // set to debug pinctrl use | 30 | // set to debug pinctrl use |
29 | #define IMX233_PINCTRL_DEBUG | 31 | #define IMX233_PINCTRL_DEBUG |
30 | 32 | ||
31 | #define HW_PINCTRL_BASE 0x80018000 | ||
32 | |||
33 | #define HW_PINCTRL_CTRL (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x0)) | ||
34 | #define HW_PINCTRL_MUXSEL(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x100 + (i) * 0x10)) | ||
35 | #define HW_PINCTRL_DRIVE(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x200 + (i) * 0x10)) | ||
36 | #define HW_PINCTRL_PULL(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x400 + (i) * 0x10)) | ||
37 | #define HW_PINCTRL_DOUT(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x500 + (i) * 0x10)) | ||
38 | #define HW_PINCTRL_DIN(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x600 + (i) * 0x10)) | ||
39 | #define HW_PINCTRL_DOE(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x700 + (i) * 0x10)) | ||
40 | #define HW_PINCTRL_PIN2IRQ(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x800 + (i) * 0x10)) | ||
41 | #define HW_PINCTRL_IRQEN(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x900 + (i) * 0x10)) | ||
42 | #define HW_PINCTRL_IRQEN(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x900 + (i) * 0x10)) | ||
43 | #define HW_PINCTRL_IRQLEVEL(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xa00 + (i) * 0x10)) | ||
44 | #define HW_PINCTRL_IRQPOL(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xb00 + (i) * 0x10)) | ||
45 | #define HW_PINCTRL_IRQSTAT(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xc00 + (i) * 0x10)) | ||
46 | |||
47 | #define PINCTRL_FUNCTION_MAIN 0 | 33 | #define PINCTRL_FUNCTION_MAIN 0 |
48 | #define PINCTRL_FUNCTION_ALT1 1 | 34 | #define PINCTRL_FUNCTION_ALT1 1 |
49 | #define PINCTRL_FUNCTION_ALT2 2 | 35 | #define PINCTRL_FUNCTION_ALT2 2 |
@@ -72,72 +58,72 @@ typedef void (*pin_irq_cb_t)(int bank, int pin); | |||
72 | 58 | ||
73 | static inline void imx233_pinctrl_init(void) | 59 | static inline void imx233_pinctrl_init(void) |
74 | { | 60 | { |
75 | __REG_CLR(HW_PINCTRL_CTRL) = __BLOCK_CLKGATE | __BLOCK_SFTRST; | 61 | HW_PINCTRL_CTRL_CLR = BM_OR2(PINCTRL_CTRL, CLKGATE, SFTRST); |
76 | } | 62 | } |
77 | 63 | ||
78 | static inline void imx233_set_pin_drive_strength(unsigned bank, unsigned pin, unsigned strength) | 64 | static inline void imx233_set_pin_drive_strength(unsigned bank, unsigned pin, unsigned strength) |
79 | { | 65 | { |
80 | __REG_CLR(HW_PINCTRL_DRIVE(4 * bank + pin / 8)) = 3 << (4 * (pin % 8)); | 66 | HW_PINCTRL_DRIVEn_CLR(4 * bank + pin / 8) = 3 << (4 * (pin % 8)); |
81 | __REG_SET(HW_PINCTRL_DRIVE(4 * bank + pin / 8)) = strength << (4 * (pin % 8)); | 67 | HW_PINCTRL_DRIVEn_SET(4 * bank + pin / 8) = strength << (4 * (pin % 8)); |
82 | } | 68 | } |
83 | 69 | ||
84 | static inline void imx233_enable_gpio_output(unsigned bank, unsigned pin, bool enable) | 70 | static inline void imx233_enable_gpio_output(unsigned bank, unsigned pin, bool enable) |
85 | { | 71 | { |
86 | if(enable) | 72 | if(enable) |
87 | __REG_SET(HW_PINCTRL_DOE(bank)) = 1 << pin; | 73 | HW_PINCTRL_DOEn_SET(bank) = 1 << pin; |
88 | else | 74 | else |
89 | __REG_CLR(HW_PINCTRL_DOE(bank)) = 1 << pin; | 75 | HW_PINCTRL_DOEn_CLR(bank) = 1 << pin; |
90 | } | 76 | } |
91 | 77 | ||
92 | static inline void imx233_enable_gpio_output_mask(unsigned bank, uint32_t pin_mask, bool enable) | 78 | static inline void imx233_enable_gpio_output_mask(unsigned bank, uint32_t pin_mask, bool enable) |
93 | { | 79 | { |
94 | if(enable) | 80 | if(enable) |
95 | __REG_SET(HW_PINCTRL_DOE(bank)) = pin_mask; | 81 | HW_PINCTRL_DOEn_SET(bank) = pin_mask; |
96 | else | 82 | else |
97 | __REG_CLR(HW_PINCTRL_DOE(bank)) = pin_mask; | 83 | HW_PINCTRL_DOEn_CLR(bank) = pin_mask; |
98 | } | 84 | } |
99 | 85 | ||
100 | static inline void imx233_set_gpio_output(unsigned bank, unsigned pin, bool value) | 86 | static inline void imx233_set_gpio_output(unsigned bank, unsigned pin, bool value) |
101 | { | 87 | { |
102 | if(value) | 88 | if(value) |
103 | __REG_SET(HW_PINCTRL_DOUT(bank)) = 1 << pin; | 89 | HW_PINCTRL_DOUTn_SET(bank) = 1 << pin; |
104 | else | 90 | else |
105 | __REG_CLR(HW_PINCTRL_DOUT(bank)) = 1 << pin; | 91 | HW_PINCTRL_DOUTn_CLR(bank) = 1 << pin; |
106 | } | 92 | } |
107 | 93 | ||
108 | static inline void imx233_set_gpio_output_mask(unsigned bank, uint32_t pin_mask, bool value) | 94 | static inline void imx233_set_gpio_output_mask(unsigned bank, uint32_t pin_mask, bool value) |
109 | { | 95 | { |
110 | if(value) | 96 | if(value) |
111 | __REG_SET(HW_PINCTRL_DOUT(bank)) = pin_mask; | 97 | HW_PINCTRL_DOUTn_SET(bank) = pin_mask; |
112 | else | 98 | else |
113 | __REG_CLR(HW_PINCTRL_DOUT(bank)) = pin_mask; | 99 | HW_PINCTRL_DOUTn_CLR(bank) = pin_mask; |
114 | } | 100 | } |
115 | 101 | ||
116 | static inline uint32_t imx233_get_gpio_input_mask(unsigned bank, uint32_t pin_mask) | 102 | static inline uint32_t imx233_get_gpio_input_mask(unsigned bank, uint32_t pin_mask) |
117 | { | 103 | { |
118 | return HW_PINCTRL_DIN(bank) & pin_mask; | 104 | return HW_PINCTRL_DINn(bank) & pin_mask; |
119 | } | 105 | } |
120 | 106 | ||
121 | static inline void imx233_set_pin_function(unsigned bank, unsigned pin, unsigned function) | 107 | static inline void imx233_set_pin_function(unsigned bank, unsigned pin, unsigned function) |
122 | { | 108 | { |
123 | __REG_CLR(HW_PINCTRL_MUXSEL(2 * bank + pin / 16)) = 3 << (2 * (pin % 16)); | 109 | HW_PINCTRL_MUXSELn_CLR(2 * bank + pin / 16) = 3 << (2 * (pin % 16)); |
124 | __REG_SET(HW_PINCTRL_MUXSEL(2 * bank + pin / 16)) = function << (2 * (pin % 16)); | 110 | HW_PINCTRL_MUXSELn_SET(2 * bank + pin / 16) = function << (2 * (pin % 16)); |
125 | } | 111 | } |
126 | 112 | ||
127 | static inline void imx233_enable_pin_pullup(unsigned bank, unsigned pin, bool enable) | 113 | static inline void imx233_enable_pin_pullup(unsigned bank, unsigned pin, bool enable) |
128 | { | 114 | { |
129 | if(enable) | 115 | if(enable) |
130 | __REG_SET(HW_PINCTRL_PULL(bank)) = 1 << pin; | 116 | HW_PINCTRL_PULLn_SET(bank) = 1 << pin; |
131 | else | 117 | else |
132 | __REG_CLR(HW_PINCTRL_PULL(bank)) = 1 << pin; | 118 | HW_PINCTRL_PULLn_CLR(bank) = 1 << pin; |
133 | } | 119 | } |
134 | 120 | ||
135 | static inline void imx233_enable_pin_pullup_mask(unsigned bank, uint32_t pin_msk, bool enable) | 121 | static inline void imx233_enable_pin_pullup_mask(unsigned bank, uint32_t pin_msk, bool enable) |
136 | { | 122 | { |
137 | if(enable) | 123 | if(enable) |
138 | __REG_SET(HW_PINCTRL_PULL(bank)) = pin_msk; | 124 | HW_PINCTRL_PULLn_SET(bank) = pin_msk; |
139 | else | 125 | else |
140 | __REG_CLR(HW_PINCTRL_PULL(bank)) = pin_msk; | 126 | HW_PINCTRL_PULLn_CLR(bank) = pin_msk; |
141 | } | 127 | } |
142 | 128 | ||
143 | /** On irq, the pin irq interrupt is disable and then cb is called; | 129 | /** On irq, the pin irq interrupt is disable and then cb is called; |
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c index cfb1a4e0a5..bd584d1822 100644 --- a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c +++ b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c | |||
@@ -84,12 +84,12 @@ static void setup_lcd_pins(bool use_lcdif) | |||
84 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ | 84 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ |
85 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ | 85 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ |
86 | imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ | 86 | imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ |
87 | __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ | 87 | HW_PINCTRL_MUXSELn_CLR(2) = 0xffffffff; /* lcd_d{0-15} */ |
88 | } | 88 | } |
89 | else | 89 | else |
90 | { | 90 | { |
91 | __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ | 91 | HW_PINCTRL_MUXSELn_SET(2) = 0xffffffff; /* lcd_d{0-15} */ |
92 | imx233_enable_gpio_output_mask(1, 0x2bfffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,enable,vsync} */ | 92 | HW_PINCTRL_DOEn_CLR(1) = 0x2bfffff; |
93 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ | 93 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ |
94 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ | 94 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ |
95 | imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_GPIO); /* lcd_rs */ | 95 | imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_GPIO); /* lcd_rs */ |
@@ -117,7 +117,7 @@ static void setup_lcd_pins_i80(bool i80) | |||
117 | imx233_set_gpio_output_mask(1, (1 << 19) | (1 << 20) | (1 << 21) | (1 << 23), true); | 117 | imx233_set_gpio_output_mask(1, (1 << 19) | (1 << 20) | (1 << 21) | (1 << 23), true); |
118 | 118 | ||
119 | imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */ | 119 | imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */ |
120 | __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} as GPIO */ | 120 | HW_PINCTRL_MUXSELn_SET(2) = 0xffffffff; /* lcd_d{0-15} as GPIO */ |
121 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ | 121 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ |
122 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ | 122 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ |
123 | imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_GPIO); /* lcd_reset */ | 123 | imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_GPIO); /* lcd_reset */ |
@@ -134,7 +134,7 @@ static void setup_lcd_pins_i80(bool i80) | |||
134 | imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ | 134 | imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ |
135 | imx233_set_pin_function(1, 21, PINCTRL_FUNCTION_MAIN); /* lcd_cs */ | 135 | imx233_set_pin_function(1, 21, PINCTRL_FUNCTION_MAIN); /* lcd_cs */ |
136 | imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */ | 136 | imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */ |
137 | __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} as lcd_d{0-15} */ | 137 | HW_PINCTRL_MUXSELn_CLR(2) = 0xffffffff; /* lcd_d{0-15} as lcd_d{0-15} */ |
138 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ | 138 | imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ |
139 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ | 139 | imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ |
140 | imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_MAIN); /* lcd_reset */ | 140 | imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_MAIN); /* lcd_reset */ |