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Diffstat (limited to 'firmware/target/arm/imx233/system-target.h')
-rw-r--r--firmware/target/arm/imx233/system-target.h30
1 files changed, 21 insertions, 9 deletions
diff --git a/firmware/target/arm/imx233/system-target.h b/firmware/target/arm/imx233/system-target.h
index 5515597570..c6073a9ae3 100644
--- a/firmware/target/arm/imx233/system-target.h
+++ b/firmware/target/arm/imx233/system-target.h
@@ -37,6 +37,18 @@
37 37
38#define HW_DIGCTL_MICROSECONDS (*(volatile uint32_t *)(HW_DIGCTL_BASE + 0xC0)) 38#define HW_DIGCTL_MICROSECONDS (*(volatile uint32_t *)(HW_DIGCTL_BASE + 0xC0))
39 39
40#define HW_DIGCTL_ARMCACHE (*(volatile uint32_t *)(HW_DIGCTL_BASE + 0x2b0))
41#define HW_DIGCTL_ARMCACHE__ITAG_SS_BP 0
42#define HW_DIGCTL_ARMCACHE__ITAG_SS_BM (3 << 0)
43#define HW_DIGCTL_ARMCACHE__DTAG_SS_BP 4
44#define HW_DIGCTL_ARMCACHE__DTAG_SS_BM (3 << 4)
45#define HW_DIGCTL_ARMCACHE__CACHE_SS_BP 8
46#define HW_DIGCTL_ARMCACHE__CACHE_SS_BM (3 << 8)
47#define HW_DIGCTL_ARMCACHE__DRTY_SS_BP 12
48#define HW_DIGCTL_ARMCACHE__DRTY_SS_BM (3 << 12)
49#define HW_DIGCTL_ARMCACHE__VALID_SS_BP 16
50#define HW_DIGCTL_ARMCACHE__VALID_SS_BM (3 << 16)
51
40/* USB Phy */ 52/* USB Phy */
41#define HW_USBPHY_BASE 0x8007C000 53#define HW_USBPHY_BASE 0x8007C000
42#define HW_USBPHY_PWD (*(volatile uint32_t *)(HW_USBPHY_BASE + 0)) 54#define HW_USBPHY_PWD (*(volatile uint32_t *)(HW_USBPHY_BASE + 0))
@@ -48,17 +60,17 @@
48 * Absolute maximum CPU speed: 454.74 MHz 60 * Absolute maximum CPU speed: 454.74 MHz
49 * Intermediate CPU speeds: 392.73 MHz, 360MHz, 261.82 MHz, 64 MHz 61 * Intermediate CPU speeds: 392.73 MHz, 360MHz, 261.82 MHz, 64 MHz
50 * Absolute minimum CPU speed: 24 MHz */ 62 * Absolute minimum CPU speed: 24 MHz */
51#define IMX233_CPUFREQ_454_MHz 454740000 63#define IMX233_CPUFREQ_454_MHz 454740
52#define IMX233_CPUFREQ_392_MHz 392730000 64#define IMX233_CPUFREQ_392_MHz 392730
53#define IMX233_CPUFREQ_360_MHz 360000000 65#define IMX233_CPUFREQ_360_MHz 360000
54#define IMX233_CPUFREQ_261_MHz 261820000 66#define IMX233_CPUFREQ_261_MHz 261820
55#define IMX233_CPUFREQ_64_MHz 64000000 67#define IMX233_CPUFREQ_64_MHz 64000
56#define IMX233_CPUFREQ_24_MHz 24000000 68#define IMX233_CPUFREQ_24_MHz 24000
57 69
58#define CPUFREQ_DEFAULT IMX233_CPUFREQ_261_MHz 70#define CPUFREQ_DEFAULT IMX233_CPUFREQ_64_MHz
59#define CPUFREQ_NORMAL IMX233_CPUFREQ_261_MHz 71#define CPUFREQ_NORMAL IMX233_CPUFREQ_64_MHz
60#define CPUFREQ_MAX IMX233_CPUFREQ_454_MHz 72#define CPUFREQ_MAX IMX233_CPUFREQ_454_MHz
61#define CPUFREQ_SLEEP IMX233_CPUFREQ_261_MHz 73#define CPUFREQ_SLEEP IMX233_CPUFREQ_64_MHz
62 74
63void udelay(unsigned us); 75void udelay(unsigned us);
64bool imx233_us_elapsed(uint32_t ref, unsigned us_delay); 76bool imx233_us_elapsed(uint32_t ref, unsigned us_delay);