summaryrefslogtreecommitdiff
path: root/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c')
-rw-r--r--firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
index 3913bf6906..39469028a0 100644
--- a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
+++ b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
@@ -157,10 +157,10 @@ static inline uint32_t decode_18_to_16(uint32_t a)
157static void setup_lcdif_clock(void) 157static void setup_lcdif_clock(void)
158{ 158{
159 /* the LCD seems to work at 24Mhz, so use the xtal clock with no divider */ 159 /* the LCD seems to work at 24Mhz, so use the xtal clock with no divider */
160 imx233_enable_clock(CLK_PIX, false); 160 imx233_clkctrl_enable_clock(CLK_PIX, false);
161 imx233_set_clock_divisor(CLK_PIX, 1); 161 imx233_clkctrl_set_clock_divisor(CLK_PIX, 1);
162 imx233_set_bypass_pll(CLK_PIX, true); /* use XTAL */ 162 imx233_clkctrl_set_bypass_pll(CLK_PIX, true); /* use XTAL */
163 imx233_enable_clock(CLK_PIX, true); 163 imx233_clkctrl_enable_clock(CLK_PIX, true);
164} 164}
165 165
166static uint32_t i80_read_register(uint32_t data_out) 166static uint32_t i80_read_register(uint32_t data_out)