diff options
Diffstat (limited to 'firmware/target/arm/imx233/regs/stmp3600/regs-arc.h')
-rw-r--r-- | firmware/target/arm/imx233/regs/stmp3600/regs-arc.h | 268 |
1 files changed, 268 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/regs/stmp3600/regs-arc.h b/firmware/target/arm/imx233/regs/stmp3600/regs-arc.h new file mode 100644 index 0000000000..af64d3a4ef --- /dev/null +++ b/firmware/target/arm/imx233/regs/stmp3600/regs-arc.h | |||
@@ -0,0 +1,268 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * This file was automatically generated by headergen, DO NOT EDIT it. | ||
9 | * headergen version: 2.1.7 | ||
10 | * XML versions: stmp3600:2.3.0 | ||
11 | * | ||
12 | * Copyright (C) 2013 by Amaury Pouly | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or | ||
15 | * modify it under the terms of the GNU General Public License | ||
16 | * as published by the Free Software Foundation; either version 2 | ||
17 | * of the License, or (at your option) any later version. | ||
18 | * | ||
19 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
20 | * KIND, either express or implied. | ||
21 | * | ||
22 | ****************************************************************************/ | ||
23 | #ifndef __HEADERGEN__STMP3600__ARC__H__ | ||
24 | #define __HEADERGEN__STMP3600__ARC__H__ | ||
25 | |||
26 | #define REGS_ARC_BASE (0x80080000) | ||
27 | |||
28 | #define REGS_ARC_VERSION "2.3.0" | ||
29 | |||
30 | /** | ||
31 | * Register: HW_ARC_BASE | ||
32 | * Address: 0 | ||
33 | * SCT: no | ||
34 | */ | ||
35 | #define HW_ARC_BASE (*(volatile unsigned long *)(REGS_ARC_BASE + 0x0)) | ||
36 | |||
37 | /** | ||
38 | * Register: HW_ARC_ID | ||
39 | * Address: 0 | ||
40 | * SCT: no | ||
41 | */ | ||
42 | #define HW_ARC_ID (*(volatile unsigned long *)(REGS_ARC_BASE + 0x0)) | ||
43 | |||
44 | /** | ||
45 | * Register: HW_ARC_HCSPARAMS | ||
46 | * Address: 0x104 | ||
47 | * SCT: no | ||
48 | */ | ||
49 | #define HW_ARC_HCSPARAMS (*(volatile unsigned long *)(REGS_ARC_BASE + 0x104)) | ||
50 | |||
51 | /** | ||
52 | * Register: HW_ARC_USBCMD | ||
53 | * Address: 0x140 | ||
54 | * SCT: no | ||
55 | */ | ||
56 | #define HW_ARC_USBCMD (*(volatile unsigned long *)(REGS_ARC_BASE + 0x140)) | ||
57 | |||
58 | /** | ||
59 | * Register: HW_ARC_USBSTS | ||
60 | * Address: 0x144 | ||
61 | * SCT: no | ||
62 | */ | ||
63 | #define HW_ARC_USBSTS (*(volatile unsigned long *)(REGS_ARC_BASE + 0x144)) | ||
64 | |||
65 | /** | ||
66 | * Register: HW_ARC_USBINTR | ||
67 | * Address: 0x148 | ||
68 | * SCT: no | ||
69 | */ | ||
70 | #define HW_ARC_USBINTR (*(volatile unsigned long *)(REGS_ARC_BASE + 0x148)) | ||
71 | |||
72 | /** | ||
73 | * Register: HW_ARC_FRINDEX | ||
74 | * Address: 0x14c | ||
75 | * SCT: no | ||
76 | */ | ||
77 | #define HW_ARC_FRINDEX (*(volatile unsigned long *)(REGS_ARC_BASE + 0x14c)) | ||
78 | |||
79 | /** | ||
80 | * Register: HW_ARC_DEVADDR | ||
81 | * Address: 0x154 | ||
82 | * SCT: no | ||
83 | */ | ||
84 | #define HW_ARC_DEVADDR (*(volatile unsigned long *)(REGS_ARC_BASE + 0x154)) | ||
85 | |||
86 | /** | ||
87 | * Register: HW_ARC_ENDPTLISTADDR | ||
88 | * Address: 0x158 | ||
89 | * SCT: no | ||
90 | */ | ||
91 | #define HW_ARC_ENDPTLISTADDR (*(volatile unsigned long *)(REGS_ARC_BASE + 0x158)) | ||
92 | |||
93 | /** | ||
94 | * Register: HW_ARC_PORTSC1 | ||
95 | * Address: 0x184 | ||
96 | * SCT: no | ||
97 | */ | ||
98 | #define HW_ARC_PORTSC1 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x184)) | ||
99 | |||
100 | /** | ||
101 | * Register: HW_ARC_OTGSC | ||
102 | * Address: 0x1a4 | ||
103 | * SCT: no | ||
104 | */ | ||
105 | #define HW_ARC_OTGSC (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1a4)) | ||
106 | |||
107 | /** | ||
108 | * Register: HW_ARC_USBMODE | ||
109 | * Address: 0x1a8 | ||
110 | * SCT: no | ||
111 | */ | ||
112 | #define HW_ARC_USBMODE (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1a8)) | ||
113 | |||
114 | /** | ||
115 | * Register: HW_ARC_ENDPTSETUPSTAT | ||
116 | * Address: 0x1ac | ||
117 | * SCT: no | ||
118 | */ | ||
119 | #define HW_ARC_ENDPTSETUPSTAT (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1ac)) | ||
120 | |||
121 | /** | ||
122 | * Register: HW_ARC_ENDPTPRIME | ||
123 | * Address: 0x1b0 | ||
124 | * SCT: no | ||
125 | */ | ||
126 | #define HW_ARC_ENDPTPRIME (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1b0)) | ||
127 | |||
128 | /** | ||
129 | * Register: HW_ARC_ENDPTFLUSH | ||
130 | * Address: 0x1b4 | ||
131 | * SCT: no | ||
132 | */ | ||
133 | #define HW_ARC_ENDPTFLUSH (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1b4)) | ||
134 | |||
135 | /** | ||
136 | * Register: HW_ARC_ENDPTSTATUS | ||
137 | * Address: 0x1b8 | ||
138 | * SCT: no | ||
139 | */ | ||
140 | #define HW_ARC_ENDPTSTATUS (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1b8)) | ||
141 | |||
142 | /** | ||
143 | * Register: HW_ARC_ENDPTCOMPLETE | ||
144 | * Address: 0x1bc | ||
145 | * SCT: no | ||
146 | */ | ||
147 | #define HW_ARC_ENDPTCOMPLETE (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1bc)) | ||
148 | |||
149 | /** | ||
150 | * Register: HW_ARC_ENDPTCTRL0 | ||
151 | * Address: 0x1c0 | ||
152 | * SCT: no | ||
153 | */ | ||
154 | #define HW_ARC_ENDPTCTRL0 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1c0)) | ||
155 | |||
156 | /** | ||
157 | * Register: HW_ARC_ENDPTCTRL1 | ||
158 | * Address: 0x1c4 | ||
159 | * SCT: no | ||
160 | */ | ||
161 | #define HW_ARC_ENDPTCTRL1 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1c4)) | ||
162 | |||
163 | /** | ||
164 | * Register: HW_ARC_ENDPTCTRL2 | ||
165 | * Address: 0x1c8 | ||
166 | * SCT: no | ||
167 | */ | ||
168 | #define HW_ARC_ENDPTCTRL2 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1c8)) | ||
169 | |||
170 | /** | ||
171 | * Register: HW_ARC_ENDPTCTRL3 | ||
172 | * Address: 0x1cc | ||
173 | * SCT: no | ||
174 | */ | ||
175 | #define HW_ARC_ENDPTCTRL3 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1cc)) | ||
176 | |||
177 | /** | ||
178 | * Register: HW_ARC_ENDPTCTRL4 | ||
179 | * Address: 0x1d0 | ||
180 | * SCT: no | ||
181 | */ | ||
182 | #define HW_ARC_ENDPTCTRL4 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1d0)) | ||
183 | |||
184 | /** | ||
185 | * Register: HW_ARC_ENDPTCTRL5 | ||
186 | * Address: 0x1d4 | ||
187 | * SCT: no | ||
188 | */ | ||
189 | #define HW_ARC_ENDPTCTRL5 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1d4)) | ||
190 | |||
191 | /** | ||
192 | * Register: HW_ARC_ENDPTCTRL6 | ||
193 | * Address: 0x1d8 | ||
194 | * SCT: no | ||
195 | */ | ||
196 | #define HW_ARC_ENDPTCTRL6 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1d8)) | ||
197 | |||
198 | /** | ||
199 | * Register: HW_ARC_ENDPTCTRL7 | ||
200 | * Address: 0x1dc | ||
201 | * SCT: no | ||
202 | */ | ||
203 | #define HW_ARC_ENDPTCTRL7 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1dc)) | ||
204 | |||
205 | /** | ||
206 | * Register: HW_ARC_ENDPTCTRL8 | ||
207 | * Address: 0x1e0 | ||
208 | * SCT: no | ||
209 | */ | ||
210 | #define HW_ARC_ENDPTCTRL8 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1e0)) | ||
211 | |||
212 | /** | ||
213 | * Register: HW_ARC_ENDPTCTRL9 | ||
214 | * Address: 0x1e4 | ||
215 | * SCT: no | ||
216 | */ | ||
217 | #define HW_ARC_ENDPTCTRL9 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1e4)) | ||
218 | |||
219 | /** | ||
220 | * Register: HW_ARC_ENDPTCTRL10 | ||
221 | * Address: 0x1e8 | ||
222 | * SCT: no | ||
223 | */ | ||
224 | #define HW_ARC_ENDPTCTRL10 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1e8)) | ||
225 | |||
226 | /** | ||
227 | * Register: HW_ARC_ENDPTCTRL11 | ||
228 | * Address: 0x1ec | ||
229 | * SCT: no | ||
230 | */ | ||
231 | #define HW_ARC_ENDPTCTRL11 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1ec)) | ||
232 | |||
233 | /** | ||
234 | * Register: HW_ARC_ENDPTCTRL12 | ||
235 | * Address: 0x1f0 | ||
236 | * SCT: no | ||
237 | */ | ||
238 | #define HW_ARC_ENDPTCTRL12 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1f0)) | ||
239 | |||
240 | /** | ||
241 | * Register: HW_ARC_ENDPTCTRL13 | ||
242 | * Address: 0x1f4 | ||
243 | * SCT: no | ||
244 | */ | ||
245 | #define HW_ARC_ENDPTCTRL13 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1f4)) | ||
246 | |||
247 | /** | ||
248 | * Register: HW_ARC_ENDPTCTRL14 | ||
249 | * Address: 0x1f8 | ||
250 | * SCT: no | ||
251 | */ | ||
252 | #define HW_ARC_ENDPTCTRL14 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1f8)) | ||
253 | |||
254 | /** | ||
255 | * Register: HW_ARC_ENDPTCTRL15 | ||
256 | * Address: 0x1fc | ||
257 | * SCT: no | ||
258 | */ | ||
259 | #define HW_ARC_ENDPTCTRL15 (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1fc)) | ||
260 | |||
261 | /** | ||
262 | * Register: HW_ARC_ENDPTCTRLn | ||
263 | * Address: 0x1c0+n*0x4 | ||
264 | * SCT: no | ||
265 | */ | ||
266 | #define HW_ARC_ENDPTCTRLn(n) (*(volatile unsigned long *)(REGS_ARC_BASE + 0x1c0+(n)*0x4)) | ||
267 | |||
268 | #endif /* __HEADERGEN__STMP3600__ARC__H__ */ | ||