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Diffstat (limited to 'firmware/target/arm/imx233/regs/imx233/regs-rtc.h')
-rw-r--r--firmware/target/arm/imx233/regs/imx233/regs-rtc.h318
1 files changed, 318 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/regs/imx233/regs-rtc.h b/firmware/target/arm/imx233/regs/imx233/regs-rtc.h
new file mode 100644
index 0000000000..fbca279a54
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+++ b/firmware/target/arm/imx233/regs/imx233/regs-rtc.h
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1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * This file was automatically generated by headergen, DO NOT EDIT it.
9 * headergen version: 2.1.7
10 * XML versions: imx233:3.2.0
11 *
12 * Copyright (C) 2013 by Amaury Pouly
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23#ifndef __HEADERGEN__IMX233__RTC__H__
24#define __HEADERGEN__IMX233__RTC__H__
25
26#define REGS_RTC_BASE (0x8005c000)
27
28#define REGS_RTC_VERSION "3.2.0"
29
30/**
31 * Register: HW_RTC_CTRL
32 * Address: 0
33 * SCT: yes
34*/
35#define HW_RTC_CTRL (*(volatile unsigned long *)(REGS_RTC_BASE + 0x0 + 0x0))
36#define HW_RTC_CTRL_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x0 + 0x4))
37#define HW_RTC_CTRL_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x0 + 0x8))
38#define HW_RTC_CTRL_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x0 + 0xc))
39#define BP_RTC_CTRL_SFTRST 31
40#define BM_RTC_CTRL_SFTRST 0x80000000
41#define BF_RTC_CTRL_SFTRST(v) (((v) << 31) & 0x80000000)
42#define BP_RTC_CTRL_CLKGATE 30
43#define BM_RTC_CTRL_CLKGATE 0x40000000
44#define BF_RTC_CTRL_CLKGATE(v) (((v) << 30) & 0x40000000)
45#define BP_RTC_CTRL_RSVD0 7
46#define BM_RTC_CTRL_RSVD0 0x3fffff80
47#define BF_RTC_CTRL_RSVD0(v) (((v) << 7) & 0x3fffff80)
48#define BP_RTC_CTRL_SUPPRESS_COPY2ANALOG 6
49#define BM_RTC_CTRL_SUPPRESS_COPY2ANALOG 0x40
50#define BF_RTC_CTRL_SUPPRESS_COPY2ANALOG(v) (((v) << 6) & 0x40)
51#define BP_RTC_CTRL_FORCE_UPDATE 5
52#define BM_RTC_CTRL_FORCE_UPDATE 0x20
53#define BF_RTC_CTRL_FORCE_UPDATE(v) (((v) << 5) & 0x20)
54#define BP_RTC_CTRL_WATCHDOGEN 4
55#define BM_RTC_CTRL_WATCHDOGEN 0x10
56#define BF_RTC_CTRL_WATCHDOGEN(v) (((v) << 4) & 0x10)
57#define BP_RTC_CTRL_ONEMSEC_IRQ 3
58#define BM_RTC_CTRL_ONEMSEC_IRQ 0x8
59#define BF_RTC_CTRL_ONEMSEC_IRQ(v) (((v) << 3) & 0x8)
60#define BP_RTC_CTRL_ALARM_IRQ 2
61#define BM_RTC_CTRL_ALARM_IRQ 0x4
62#define BF_RTC_CTRL_ALARM_IRQ(v) (((v) << 2) & 0x4)
63#define BP_RTC_CTRL_ONEMSEC_IRQ_EN 1
64#define BM_RTC_CTRL_ONEMSEC_IRQ_EN 0x2
65#define BF_RTC_CTRL_ONEMSEC_IRQ_EN(v) (((v) << 1) & 0x2)
66#define BP_RTC_CTRL_ALARM_IRQ_EN 0
67#define BM_RTC_CTRL_ALARM_IRQ_EN 0x1
68#define BF_RTC_CTRL_ALARM_IRQ_EN(v) (((v) << 0) & 0x1)
69
70/**
71 * Register: HW_RTC_STAT
72 * Address: 0x10
73 * SCT: yes
74*/
75#define HW_RTC_STAT (*(volatile unsigned long *)(REGS_RTC_BASE + 0x10 + 0x0))
76#define HW_RTC_STAT_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x10 + 0x4))
77#define HW_RTC_STAT_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x10 + 0x8))
78#define HW_RTC_STAT_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x10 + 0xc))
79#define BP_RTC_STAT_RTC_PRESENT 31
80#define BM_RTC_STAT_RTC_PRESENT 0x80000000
81#define BF_RTC_STAT_RTC_PRESENT(v) (((v) << 31) & 0x80000000)
82#define BP_RTC_STAT_ALARM_PRESENT 30
83#define BM_RTC_STAT_ALARM_PRESENT 0x40000000
84#define BF_RTC_STAT_ALARM_PRESENT(v) (((v) << 30) & 0x40000000)
85#define BP_RTC_STAT_WATCHDOG_PRESENT 29
86#define BM_RTC_STAT_WATCHDOG_PRESENT 0x20000000
87#define BF_RTC_STAT_WATCHDOG_PRESENT(v) (((v) << 29) & 0x20000000)
88#define BP_RTC_STAT_XTAL32000_PRESENT 28
89#define BM_RTC_STAT_XTAL32000_PRESENT 0x10000000
90#define BF_RTC_STAT_XTAL32000_PRESENT(v) (((v) << 28) & 0x10000000)
91#define BP_RTC_STAT_XTAL32768_PRESENT 27
92#define BM_RTC_STAT_XTAL32768_PRESENT 0x8000000
93#define BF_RTC_STAT_XTAL32768_PRESENT(v) (((v) << 27) & 0x8000000)
94#define BP_RTC_STAT_RSVD1 24
95#define BM_RTC_STAT_RSVD1 0x7000000
96#define BF_RTC_STAT_RSVD1(v) (((v) << 24) & 0x7000000)
97#define BP_RTC_STAT_STALE_REGS 16
98#define BM_RTC_STAT_STALE_REGS 0xff0000
99#define BF_RTC_STAT_STALE_REGS(v) (((v) << 16) & 0xff0000)
100#define BP_RTC_STAT_NEW_REGS 8
101#define BM_RTC_STAT_NEW_REGS 0xff00
102#define BF_RTC_STAT_NEW_REGS(v) (((v) << 8) & 0xff00)
103#define BP_RTC_STAT_RSVD0 0
104#define BM_RTC_STAT_RSVD0 0xff
105#define BF_RTC_STAT_RSVD0(v) (((v) << 0) & 0xff)
106
107/**
108 * Register: HW_RTC_MILLISECONDS
109 * Address: 0x20
110 * SCT: yes
111*/
112#define HW_RTC_MILLISECONDS (*(volatile unsigned long *)(REGS_RTC_BASE + 0x20 + 0x0))
113#define HW_RTC_MILLISECONDS_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x20 + 0x4))
114#define HW_RTC_MILLISECONDS_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x20 + 0x8))
115#define HW_RTC_MILLISECONDS_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x20 + 0xc))
116#define BP_RTC_MILLISECONDS_COUNT 0
117#define BM_RTC_MILLISECONDS_COUNT 0xffffffff
118#define BF_RTC_MILLISECONDS_COUNT(v) (((v) << 0) & 0xffffffff)
119
120/**
121 * Register: HW_RTC_SECONDS
122 * Address: 0x30
123 * SCT: yes
124*/
125#define HW_RTC_SECONDS (*(volatile unsigned long *)(REGS_RTC_BASE + 0x30 + 0x0))
126#define HW_RTC_SECONDS_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x30 + 0x4))
127#define HW_RTC_SECONDS_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x30 + 0x8))
128#define HW_RTC_SECONDS_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x30 + 0xc))
129#define BP_RTC_SECONDS_COUNT 0
130#define BM_RTC_SECONDS_COUNT 0xffffffff
131#define BF_RTC_SECONDS_COUNT(v) (((v) << 0) & 0xffffffff)
132
133/**
134 * Register: HW_RTC_ALARM
135 * Address: 0x40
136 * SCT: yes
137*/
138#define HW_RTC_ALARM (*(volatile unsigned long *)(REGS_RTC_BASE + 0x40 + 0x0))
139#define HW_RTC_ALARM_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x40 + 0x4))
140#define HW_RTC_ALARM_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x40 + 0x8))
141#define HW_RTC_ALARM_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x40 + 0xc))
142#define BP_RTC_ALARM_VALUE 0
143#define BM_RTC_ALARM_VALUE 0xffffffff
144#define BF_RTC_ALARM_VALUE(v) (((v) << 0) & 0xffffffff)
145
146/**
147 * Register: HW_RTC_WATCHDOG
148 * Address: 0x50
149 * SCT: yes
150*/
151#define HW_RTC_WATCHDOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x50 + 0x0))
152#define HW_RTC_WATCHDOG_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x50 + 0x4))
153#define HW_RTC_WATCHDOG_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x50 + 0x8))
154#define HW_RTC_WATCHDOG_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x50 + 0xc))
155#define BP_RTC_WATCHDOG_COUNT 0
156#define BM_RTC_WATCHDOG_COUNT 0xffffffff
157#define BF_RTC_WATCHDOG_COUNT(v) (((v) << 0) & 0xffffffff)
158
159/**
160 * Register: HW_RTC_PERSISTENT0
161 * Address: 0x60
162 * SCT: yes
163*/
164#define HW_RTC_PERSISTENT0 (*(volatile unsigned long *)(REGS_RTC_BASE + 0x60 + 0x0))
165#define HW_RTC_PERSISTENT0_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x60 + 0x4))
166#define HW_RTC_PERSISTENT0_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x60 + 0x8))
167#define HW_RTC_PERSISTENT0_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x60 + 0xc))
168#define BP_RTC_PERSISTENT0_SPARE_ANALOG 18
169#define BM_RTC_PERSISTENT0_SPARE_ANALOG 0xfffc0000
170#define BF_RTC_PERSISTENT0_SPARE_ANALOG(v) (((v) << 18) & 0xfffc0000)
171#define BP_RTC_PERSISTENT0_AUTO_RESTART 17
172#define BM_RTC_PERSISTENT0_AUTO_RESTART 0x20000
173#define BF_RTC_PERSISTENT0_AUTO_RESTART(v) (((v) << 17) & 0x20000)
174#define BP_RTC_PERSISTENT0_DISABLE_PSWITCH 16
175#define BM_RTC_PERSISTENT0_DISABLE_PSWITCH 0x10000
176#define BF_RTC_PERSISTENT0_DISABLE_PSWITCH(v) (((v) << 16) & 0x10000)
177#define BP_RTC_PERSISTENT0_LOWERBIAS 14
178#define BM_RTC_PERSISTENT0_LOWERBIAS 0xc000
179#define BF_RTC_PERSISTENT0_LOWERBIAS(v) (((v) << 14) & 0xc000)
180#define BP_RTC_PERSISTENT0_DISABLE_XTALOK 13
181#define BM_RTC_PERSISTENT0_DISABLE_XTALOK 0x2000
182#define BF_RTC_PERSISTENT0_DISABLE_XTALOK(v) (((v) << 13) & 0x2000)
183#define BP_RTC_PERSISTENT0_MSEC_RES 8
184#define BM_RTC_PERSISTENT0_MSEC_RES 0x1f00
185#define BF_RTC_PERSISTENT0_MSEC_RES(v) (((v) << 8) & 0x1f00)
186#define BP_RTC_PERSISTENT0_ALARM_WAKE 7
187#define BM_RTC_PERSISTENT0_ALARM_WAKE 0x80
188#define BF_RTC_PERSISTENT0_ALARM_WAKE(v) (((v) << 7) & 0x80)
189#define BP_RTC_PERSISTENT0_XTAL32_FREQ 6
190#define BM_RTC_PERSISTENT0_XTAL32_FREQ 0x40
191#define BF_RTC_PERSISTENT0_XTAL32_FREQ(v) (((v) << 6) & 0x40)
192#define BP_RTC_PERSISTENT0_XTAL32KHZ_PWRUP 5
193#define BM_RTC_PERSISTENT0_XTAL32KHZ_PWRUP 0x20
194#define BF_RTC_PERSISTENT0_XTAL32KHZ_PWRUP(v) (((v) << 5) & 0x20)
195#define BP_RTC_PERSISTENT0_XTAL24MHZ_PWRUP 4
196#define BM_RTC_PERSISTENT0_XTAL24MHZ_PWRUP 0x10
197#define BF_RTC_PERSISTENT0_XTAL24MHZ_PWRUP(v) (((v) << 4) & 0x10)
198#define BP_RTC_PERSISTENT0_LCK_SECS 3
199#define BM_RTC_PERSISTENT0_LCK_SECS 0x8
200#define BF_RTC_PERSISTENT0_LCK_SECS(v) (((v) << 3) & 0x8)
201#define BP_RTC_PERSISTENT0_ALARM_EN 2
202#define BM_RTC_PERSISTENT0_ALARM_EN 0x4
203#define BF_RTC_PERSISTENT0_ALARM_EN(v) (((v) << 2) & 0x4)
204#define BP_RTC_PERSISTENT0_ALARM_WAKE_EN 1
205#define BM_RTC_PERSISTENT0_ALARM_WAKE_EN 0x2
206#define BF_RTC_PERSISTENT0_ALARM_WAKE_EN(v) (((v) << 1) & 0x2)
207#define BP_RTC_PERSISTENT0_CLOCKSOURCE 0
208#define BM_RTC_PERSISTENT0_CLOCKSOURCE 0x1
209#define BF_RTC_PERSISTENT0_CLOCKSOURCE(v) (((v) << 0) & 0x1)
210
211/**
212 * Register: HW_RTC_PERSISTENT1
213 * Address: 0x70
214 * SCT: yes
215*/
216#define HW_RTC_PERSISTENT1 (*(volatile unsigned long *)(REGS_RTC_BASE + 0x70 + 0x0))
217#define HW_RTC_PERSISTENT1_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x70 + 0x4))
218#define HW_RTC_PERSISTENT1_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x70 + 0x8))
219#define HW_RTC_PERSISTENT1_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x70 + 0xc))
220#define BP_RTC_PERSISTENT1_GENERAL 0
221#define BM_RTC_PERSISTENT1_GENERAL 0xffffffff
222#define BV_RTC_PERSISTENT1_GENERAL__ENUMERATE_500MA_TWICE 0x1000
223#define BV_RTC_PERSISTENT1_GENERAL__USB_BOOT_PLAYER_MODE 0x800
224#define BV_RTC_PERSISTENT1_GENERAL__SKIP_CHECKDISK 0x400
225#define BV_RTC_PERSISTENT1_GENERAL__USB_LOW_POWER_MODE 0x200
226#define BV_RTC_PERSISTENT1_GENERAL__OTG_HNP_BIT 0x100
227#define BV_RTC_PERSISTENT1_GENERAL__OTG_ATL_ROLE_BIT 0x80
228#define BF_RTC_PERSISTENT1_GENERAL(v) (((v) << 0) & 0xffffffff)
229#define BF_RTC_PERSISTENT1_GENERAL_V(v) ((BV_RTC_PERSISTENT1_GENERAL__##v << 0) & 0xffffffff)
230
231/**
232 * Register: HW_RTC_PERSISTENT2
233 * Address: 0x80
234 * SCT: yes
235*/
236#define HW_RTC_PERSISTENT2 (*(volatile unsigned long *)(REGS_RTC_BASE + 0x80 + 0x0))
237#define HW_RTC_PERSISTENT2_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x80 + 0x4))
238#define HW_RTC_PERSISTENT2_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x80 + 0x8))
239#define HW_RTC_PERSISTENT2_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x80 + 0xc))
240#define BP_RTC_PERSISTENT2_GENERAL 0
241#define BM_RTC_PERSISTENT2_GENERAL 0xffffffff
242#define BF_RTC_PERSISTENT2_GENERAL(v) (((v) << 0) & 0xffffffff)
243
244/**
245 * Register: HW_RTC_PERSISTENT3
246 * Address: 0x90
247 * SCT: yes
248*/
249#define HW_RTC_PERSISTENT3 (*(volatile unsigned long *)(REGS_RTC_BASE + 0x90 + 0x0))
250#define HW_RTC_PERSISTENT3_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0x90 + 0x4))
251#define HW_RTC_PERSISTENT3_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0x90 + 0x8))
252#define HW_RTC_PERSISTENT3_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0x90 + 0xc))
253#define BP_RTC_PERSISTENT3_GENERAL 0
254#define BM_RTC_PERSISTENT3_GENERAL 0xffffffff
255#define BF_RTC_PERSISTENT3_GENERAL(v) (((v) << 0) & 0xffffffff)
256
257/**
258 * Register: HW_RTC_PERSISTENT4
259 * Address: 0xa0
260 * SCT: yes
261*/
262#define HW_RTC_PERSISTENT4 (*(volatile unsigned long *)(REGS_RTC_BASE + 0xa0 + 0x0))
263#define HW_RTC_PERSISTENT4_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0xa0 + 0x4))
264#define HW_RTC_PERSISTENT4_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0xa0 + 0x8))
265#define HW_RTC_PERSISTENT4_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0xa0 + 0xc))
266#define BP_RTC_PERSISTENT4_GENERAL 0
267#define BM_RTC_PERSISTENT4_GENERAL 0xffffffff
268#define BF_RTC_PERSISTENT4_GENERAL(v) (((v) << 0) & 0xffffffff)
269
270/**
271 * Register: HW_RTC_PERSISTENT5
272 * Address: 0xb0
273 * SCT: yes
274*/
275#define HW_RTC_PERSISTENT5 (*(volatile unsigned long *)(REGS_RTC_BASE + 0xb0 + 0x0))
276#define HW_RTC_PERSISTENT5_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0xb0 + 0x4))
277#define HW_RTC_PERSISTENT5_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0xb0 + 0x8))
278#define HW_RTC_PERSISTENT5_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0xb0 + 0xc))
279#define BP_RTC_PERSISTENT5_GENERAL 0
280#define BM_RTC_PERSISTENT5_GENERAL 0xffffffff
281#define BF_RTC_PERSISTENT5_GENERAL(v) (((v) << 0) & 0xffffffff)
282
283/**
284 * Register: HW_RTC_DEBUG
285 * Address: 0xc0
286 * SCT: yes
287*/
288#define HW_RTC_DEBUG (*(volatile unsigned long *)(REGS_RTC_BASE + 0xc0 + 0x0))
289#define HW_RTC_DEBUG_SET (*(volatile unsigned long *)(REGS_RTC_BASE + 0xc0 + 0x4))
290#define HW_RTC_DEBUG_CLR (*(volatile unsigned long *)(REGS_RTC_BASE + 0xc0 + 0x8))
291#define HW_RTC_DEBUG_TOG (*(volatile unsigned long *)(REGS_RTC_BASE + 0xc0 + 0xc))
292#define BP_RTC_DEBUG_RSVD0 2
293#define BM_RTC_DEBUG_RSVD0 0xfffffffc
294#define BF_RTC_DEBUG_RSVD0(v) (((v) << 2) & 0xfffffffc)
295#define BP_RTC_DEBUG_WATCHDOG_RESET_MASK 1
296#define BM_RTC_DEBUG_WATCHDOG_RESET_MASK 0x2
297#define BF_RTC_DEBUG_WATCHDOG_RESET_MASK(v) (((v) << 1) & 0x2)
298#define BP_RTC_DEBUG_WATCHDOG_RESET 0
299#define BM_RTC_DEBUG_WATCHDOG_RESET 0x1
300#define BF_RTC_DEBUG_WATCHDOG_RESET(v) (((v) << 0) & 0x1)
301
302/**
303 * Register: HW_RTC_VERSION
304 * Address: 0xd0
305 * SCT: no
306*/
307#define HW_RTC_VERSION (*(volatile unsigned long *)(REGS_RTC_BASE + 0xd0))
308#define BP_RTC_VERSION_MAJOR 24
309#define BM_RTC_VERSION_MAJOR 0xff000000
310#define BF_RTC_VERSION_MAJOR(v) (((v) << 24) & 0xff000000)
311#define BP_RTC_VERSION_MINOR 16
312#define BM_RTC_VERSION_MINOR 0xff0000
313#define BF_RTC_VERSION_MINOR(v) (((v) << 16) & 0xff0000)
314#define BP_RTC_VERSION_STEP 0
315#define BM_RTC_VERSION_STEP 0xffff
316#define BF_RTC_VERSION_STEP(v) (((v) << 0) & 0xffff)
317
318#endif /* __HEADERGEN__IMX233__RTC__H__ */