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Diffstat (limited to 'firmware/target/arm/imx233/pwm-imx233.c')
-rw-r--r--firmware/target/arm/imx233/pwm-imx233.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/firmware/target/arm/imx233/pwm-imx233.c b/firmware/target/arm/imx233/pwm-imx233.c
index 00aba9320e..c434338a07 100644
--- a/firmware/target/arm/imx233/pwm-imx233.c
+++ b/firmware/target/arm/imx233/pwm-imx233.c
@@ -25,7 +25,7 @@
25void imx233_pwm_init(void) 25void imx233_pwm_init(void)
26{ 26{
27 imx233_reset_block(&HW_PWM_CTRL); 27 imx233_reset_block(&HW_PWM_CTRL);
28 imx233_clkctrl_enable_xtal(XTAM_PWM, true); 28 imx233_clkctrl_enable(CLK_PWM, true);
29} 29}
30 30
31bool imx233_pwm_is_channel_enable(int channel) 31bool imx233_pwm_is_channel_enable(int channel)
@@ -50,7 +50,8 @@ void imx233_pwm_setup_channel(int channel, int period, int cdiv, int active,
50 imx233_pwm_enable_channel(channel, false); 50 imx233_pwm_enable_channel(channel, false);
51 /* setup pin */ 51 /* setup pin */
52 imx233_pinctrl_setup_vpin(VPIN_PWM(channel), "pwm", PINCTRL_DRIVE_4mA, false); 52 imx233_pinctrl_setup_vpin(VPIN_PWM(channel), "pwm", PINCTRL_DRIVE_4mA, false);
53 /* watch the order ! active THEN period */ 53 /* watch the order ! active THEN period
54 * NOTE: the register value is period-1 */
54 HW_PWM_ACTIVEn(channel) = BF_OR2(PWM_ACTIVEn, ACTIVE(active), INACTIVE(inactive)); 55 HW_PWM_ACTIVEn(channel) = BF_OR2(PWM_ACTIVEn, ACTIVE(active), INACTIVE(inactive));
55 HW_PWM_PERIODn(channel) = BF_OR4(PWM_PERIODn, PERIOD(period - 1), 56 HW_PWM_PERIODn(channel) = BF_OR4(PWM_PERIODn, PERIOD(period - 1),
56 ACTIVE_STATE(active_state), INACTIVE_STATE(inactive_state), CDIV(cdiv)); 57 ACTIVE_STATE(active_state), INACTIVE_STATE(inactive_state), CDIV(cdiv));