diff options
Diffstat (limited to 'firmware/target/arm/imx233/icoll-imx233.c')
-rw-r--r-- | firmware/target/arm/imx233/icoll-imx233.c | 52 |
1 files changed, 38 insertions, 14 deletions
diff --git a/firmware/target/arm/imx233/icoll-imx233.c b/firmware/target/arm/imx233/icoll-imx233.c index 1bd363e781..20b526d4fb 100644 --- a/firmware/target/arm/imx233/icoll-imx233.c +++ b/firmware/target/arm/imx233/icoll-imx233.c | |||
@@ -36,12 +36,8 @@ default_interrupt(INT_TIMER0); | |||
36 | default_interrupt(INT_TIMER1); | 36 | default_interrupt(INT_TIMER1); |
37 | default_interrupt(INT_TIMER2); | 37 | default_interrupt(INT_TIMER2); |
38 | default_interrupt(INT_TIMER3); | 38 | default_interrupt(INT_TIMER3); |
39 | default_interrupt(INT_LCDIF_DMA); | ||
40 | default_interrupt(INT_LCDIF_ERROR); | ||
41 | default_interrupt(INT_SSP1_DMA); | 39 | default_interrupt(INT_SSP1_DMA); |
42 | default_interrupt(INT_SSP1_ERROR); | 40 | default_interrupt(INT_SSP1_ERROR); |
43 | default_interrupt(INT_SSP2_DMA); | ||
44 | default_interrupt(INT_SSP2_ERROR); | ||
45 | default_interrupt(INT_I2C_DMA); | 41 | default_interrupt(INT_I2C_DMA); |
46 | default_interrupt(INT_I2C_ERROR); | 42 | default_interrupt(INT_I2C_ERROR); |
47 | default_interrupt(INT_GPIO0); | 43 | default_interrupt(INT_GPIO0); |
@@ -60,11 +56,19 @@ default_interrupt(INT_DAC_DMA); | |||
60 | default_interrupt(INT_DAC_ERROR); | 56 | default_interrupt(INT_DAC_ERROR); |
61 | default_interrupt(INT_ADC_DMA); | 57 | default_interrupt(INT_ADC_DMA); |
62 | default_interrupt(INT_ADC_ERROR); | 58 | default_interrupt(INT_ADC_ERROR); |
63 | default_interrupt(INT_DCP); | ||
64 | default_interrupt(INT_TOUCH_DETECT); | 59 | default_interrupt(INT_TOUCH_DETECT); |
65 | default_interrupt(INT_RTC_1MSEC); | 60 | default_interrupt(INT_RTC_1MSEC); |
66 | 61 | /* STMP3700+ specific */ | |
67 | void INT_RTC_1MSEC(void); | 62 | #if IMX233_SUBTARGET >= 3700 |
63 | default_interrupt(INT_SSP2_DMA); | ||
64 | default_interrupt(INT_SSP2_ERROR); | ||
65 | default_interrupt(INT_DCP); | ||
66 | default_interrupt(INT_LCDIF_DMA); | ||
67 | default_interrupt(INT_LCDIF_ERROR); | ||
68 | #endif | ||
69 | /* STMP3780+ specific */ | ||
70 | #if IMX233_SUBTARGET >= 3780 | ||
71 | #endif | ||
68 | 72 | ||
69 | typedef void (*isr_t)(void); | 73 | typedef void (*isr_t)(void); |
70 | 74 | ||
@@ -75,12 +79,8 @@ static isr_t isr_table[INT_SRC_NR_SOURCES] = | |||
75 | [INT_SRC_TIMER(1)] = INT_TIMER1, | 79 | [INT_SRC_TIMER(1)] = INT_TIMER1, |
76 | [INT_SRC_TIMER(2)] = INT_TIMER2, | 80 | [INT_SRC_TIMER(2)] = INT_TIMER2, |
77 | [INT_SRC_TIMER(3)] = INT_TIMER3, | 81 | [INT_SRC_TIMER(3)] = INT_TIMER3, |
78 | [INT_SRC_LCDIF_DMA] = INT_LCDIF_DMA, | ||
79 | [INT_SRC_LCDIF_ERROR] = INT_LCDIF_ERROR, | ||
80 | [INT_SRC_SSP1_DMA] = INT_SSP1_DMA, | 82 | [INT_SRC_SSP1_DMA] = INT_SSP1_DMA, |
81 | [INT_SRC_SSP1_ERROR] = INT_SSP1_ERROR, | 83 | [INT_SRC_SSP1_ERROR] = INT_SSP1_ERROR, |
82 | [INT_SRC_SSP2_DMA] = INT_SSP2_DMA, | ||
83 | [INT_SRC_SSP2_ERROR] = INT_SSP2_ERROR, | ||
84 | [INT_SRC_I2C_DMA] = INT_I2C_DMA, | 84 | [INT_SRC_I2C_DMA] = INT_I2C_DMA, |
85 | [INT_SRC_I2C_ERROR] = INT_I2C_ERROR, | 85 | [INT_SRC_I2C_ERROR] = INT_I2C_ERROR, |
86 | [INT_SRC_GPIO0] = INT_GPIO0, | 86 | [INT_SRC_GPIO0] = INT_GPIO0, |
@@ -99,9 +99,17 @@ static isr_t isr_table[INT_SRC_NR_SOURCES] = | |||
99 | [INT_SRC_DAC_ERROR] = INT_DAC_ERROR, | 99 | [INT_SRC_DAC_ERROR] = INT_DAC_ERROR, |
100 | [INT_SRC_ADC_DMA] = INT_ADC_DMA, | 100 | [INT_SRC_ADC_DMA] = INT_ADC_DMA, |
101 | [INT_SRC_ADC_ERROR] = INT_ADC_ERROR, | 101 | [INT_SRC_ADC_ERROR] = INT_ADC_ERROR, |
102 | [INT_SRC_DCP] = INT_DCP, | ||
103 | [INT_SRC_TOUCH_DETECT] = INT_TOUCH_DETECT, | 102 | [INT_SRC_TOUCH_DETECT] = INT_TOUCH_DETECT, |
104 | [INT_SRC_RTC_1MSEC] = INT_RTC_1MSEC, | 103 | [INT_SRC_RTC_1MSEC] = INT_RTC_1MSEC, |
104 | #if IMX233_SUBTARGET >= 3700 | ||
105 | [INT_SRC_SSP2_DMA] = INT_SSP2_DMA, | ||
106 | [INT_SRC_SSP2_ERROR] = INT_SSP2_ERROR, | ||
107 | [INT_SRC_DCP] = INT_DCP, | ||
108 | [INT_SRC_LCDIF_DMA] = INT_LCDIF_DMA, | ||
109 | [INT_SRC_LCDIF_ERROR] = INT_LCDIF_ERROR, | ||
110 | #endif | ||
111 | #if IMX233_SUBTARGET >= 3780 | ||
112 | #endif | ||
105 | }; | 113 | }; |
106 | 114 | ||
107 | #define IRQ_STORM_DELAY 100 /* ms */ | 115 | #define IRQ_STORM_DELAY 100 /* ms */ |
@@ -113,7 +121,11 @@ static uint32_t irq_count[INT_SRC_NR_SOURCES]; | |||
113 | struct imx233_icoll_irq_info_t imx233_icoll_get_irq_info(int src) | 121 | struct imx233_icoll_irq_info_t imx233_icoll_get_irq_info(int src) |
114 | { | 122 | { |
115 | struct imx233_icoll_irq_info_t info; | 123 | struct imx233_icoll_irq_info_t info; |
124 | #if IMX233_SUBTARGET < 3780 | ||
125 | info.enabled = BF_RDn(ICOLL_PRIORITYn, src / 4, ENABLEx(src % 4)); | ||
126 | #else | ||
116 | info.enabled = BF_RDn(ICOLL_INTERRUPTn, src, ENABLE); | 127 | info.enabled = BF_RDn(ICOLL_INTERRUPTn, src, ENABLE); |
128 | #endif | ||
117 | info.freq = irq_count_old[src]; | 129 | info.freq = irq_count_old[src]; |
118 | return info; | 130 | return info; |
119 | } | 131 | } |
@@ -154,19 +166,31 @@ void fiq_handler(void) | |||
154 | 166 | ||
155 | void imx233_icoll_enable_interrupt(int src, bool enable) | 167 | void imx233_icoll_enable_interrupt(int src, bool enable) |
156 | { | 168 | { |
169 | #if IMX233_SUBTARGET < 3780 | ||
170 | if(enable) | ||
171 | BF_SETn(ICOLL_PRIORITYn, src / 4, ENABLEx(src % 4)); | ||
172 | else | ||
173 | BF_CLRn(ICOLL_PRIORITYn, src / 4, ENABLEx(src % 4)); | ||
174 | #else | ||
157 | if(enable) | 175 | if(enable) |
158 | BF_SETn(ICOLL_INTERRUPTn, src, ENABLE); | 176 | BF_SETn(ICOLL_INTERRUPTn, src, ENABLE); |
159 | else | 177 | else |
160 | BF_CLRn(ICOLL_INTERRUPTn, src, ENABLE); | 178 | BF_CLRn(ICOLL_INTERRUPTn, src, ENABLE); |
179 | #endif | ||
161 | } | 180 | } |
162 | 181 | ||
163 | void imx233_icoll_init(void) | 182 | void imx233_icoll_init(void) |
164 | { | 183 | { |
165 | imx233_reset_block(&HW_ICOLL_CTRL); | 184 | imx233_reset_block(&HW_ICOLL_CTRL); |
166 | /* disable all interrupts: | 185 | /* disable all interrupts */ |
167 | * priority = 0, disable, disable fiq */ | 186 | /* priority = 0, disable, disable fiq */ |
187 | #if IMX233_SUBTARGET >= 3780 | ||
168 | for(int i = 0; i < INT_SRC_NR_SOURCES; i++) | 188 | for(int i = 0; i < INT_SRC_NR_SOURCES; i++) |
169 | HW_ICOLL_INTERRUPTn(i) = 0; | 189 | HW_ICOLL_INTERRUPTn(i) = 0; |
190 | #else | ||
191 | for(int i = 0; i < INT_SRC_NR_SOURCES / 4; i++) | ||
192 | HW_ICOLL_PRIORITYn(i) = 0; | ||
193 | #endif | ||
170 | /* setup vbase as isr_table */ | 194 | /* setup vbase as isr_table */ |
171 | HW_ICOLL_VBASE = (uint32_t)&isr_table; | 195 | HW_ICOLL_VBASE = (uint32_t)&isr_table; |
172 | /* enable final irq bit */ | 196 | /* enable final irq bit */ |