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Diffstat (limited to 'firmware/target/arm/imx233/i2c-imx233.c')
-rw-r--r--firmware/target/arm/imx233/i2c-imx233.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/firmware/target/arm/imx233/i2c-imx233.c b/firmware/target/arm/imx233/i2c-imx233.c
index f72be503fa..054ce09a28 100644
--- a/firmware/target/arm/imx233/i2c-imx233.c
+++ b/firmware/target/arm/imx233/i2c-imx233.c
@@ -145,17 +145,15 @@ enum imx233_i2c_error_t imx233_i2c_add(bool start, bool transmit, void *buffer,
145 if(i2c_nr_stages > 0) 145 if(i2c_nr_stages > 0)
146 { 146 {
147 i2c_stage[i2c_nr_stages - 1].dma.next = &i2c_stage[i2c_nr_stages].dma; 147 i2c_stage[i2c_nr_stages - 1].dma.next = &i2c_stage[i2c_nr_stages].dma;
148 i2c_stage[i2c_nr_stages - 1].dma.cmd |= HW_APB_CHx_CMD__CHAIN; 148 i2c_stage[i2c_nr_stages - 1].dma.cmd |= BM_APB_CHx_CMD_CHAIN;
149 if(!start) 149 if(!start)
150 i2c_stage[i2c_nr_stages - 1].ctrl0 |= BM_I2C_CTRL0_RETAIN_CLOCK; 150 i2c_stage[i2c_nr_stages - 1].ctrl0 |= BM_I2C_CTRL0_RETAIN_CLOCK;
151 } 151 }
152 i2c_stage[i2c_nr_stages].dma.buffer = i2c_buffer + start_off; 152 i2c_stage[i2c_nr_stages].dma.buffer = i2c_buffer + start_off;
153 i2c_stage[i2c_nr_stages].dma.next = NULL; 153 i2c_stage[i2c_nr_stages].dma.next = NULL;
154 i2c_stage[i2c_nr_stages].dma.cmd = 154 i2c_stage[i2c_nr_stages].dma.cmd = BF_OR4(APB_CHx_CMD,
155 (transmit ? HW_APB_CHx_CMD__COMMAND__READ : HW_APB_CHx_CMD__COMMAND__WRITE) | 155 COMMAND(transmit ? BV_APB_CHx_CMD_COMMAND__READ : BV_APB_CHx_CMD_COMMAND__WRITE),
156 HW_APB_CHx_CMD__WAIT4ENDCMD | 156 WAIT4ENDCMD(1), CMDWORDS(1), XFER_COUNT(size));
157 1 << HW_APB_CHx_CMD__CMDWORDS_BP |
158 size << HW_APB_CHx_CMD__XFER_COUNT_BP;
159 /* assume that any read is final (send nak on last) */ 157 /* assume that any read is final (send nak on last) */
160 i2c_stage[i2c_nr_stages].ctrl0 = BF_OR6(I2C_CTRL0, 158 i2c_stage[i2c_nr_stages].ctrl0 = BF_OR6(I2C_CTRL0,
161 XFER_COUNT(size), DIRECTION(transmit), SEND_NAK_ON_LAST(!transmit), 159 XFER_COUNT(size), DIRECTION(transmit), SEND_NAK_ON_LAST(!transmit),
@@ -170,8 +168,8 @@ static enum imx233_i2c_error_t imx233_i2c_finalize(void)
170 for(int i = 0; i < i2c_nr_stages; i++) 168 for(int i = 0; i < i2c_nr_stages; i++)
171 { 169 {
172 struct i2c_dma_command_t *c = &i2c_stage[i]; 170 struct i2c_dma_command_t *c = &i2c_stage[i];
173 if(__XTRACT_EX(c->dma.cmd, HW_APB_CHx_CMD__COMMAND) == HW_APB_CHx_CMD__COMMAND__WRITE) 171 if(BF_RDX(c->dma.cmd, APB_CHx_CMD, COMMAND) == BV_APB_CHx_CMD_COMMAND__WRITE)
174 memcpy(c->dst, c->src, __XTRACT_EX(c->dma.cmd, HW_APB_CHx_CMD__XFER_COUNT)); 172 memcpy(c->dst, c->src, BF_RDX(c->dma.cmd, APB_CHx_CMD, XFER_COUNT));
175 } 173 }
176 return I2C_SUCCESS; 174 return I2C_SUCCESS;
177} 175}
@@ -180,7 +178,7 @@ enum imx233_i2c_error_t imx233_i2c_end(unsigned timeout)
180{ 178{
181 if(i2c_nr_stages == 0) 179 if(i2c_nr_stages == 0)
182 return I2C_ERROR; 180 return I2C_ERROR;
183 i2c_stage[i2c_nr_stages - 1].dma.cmd |= HW_APB_CHx_CMD__SEMAPHORE | HW_APB_CHx_CMD__IRQONCMPLT; 181 i2c_stage[i2c_nr_stages - 1].dma.cmd |= BM_APB_CHx_CMD_SEMAPHORE | BM_APB_CHx_CMD_IRQONCMPLT;
184 182
185 BF_CLR(I2C_CTRL1, ALL_IRQ); 183 BF_CLR(I2C_CTRL1, ALL_IRQ);
186 imx233_dma_reset_channel(APB_I2C); 184 imx233_dma_reset_channel(APB_I2C);