diff options
Diffstat (limited to 'firmware/target/arm/imx233/dma-imx233.h')
-rw-r--r-- | firmware/target/arm/imx233/dma-imx233.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/firmware/target/arm/imx233/dma-imx233.h b/firmware/target/arm/imx233/dma-imx233.h index ee836c2186..00b69ecf96 100644 --- a/firmware/target/arm/imx233/dma-imx233.h +++ b/firmware/target/arm/imx233/dma-imx233.h | |||
@@ -154,6 +154,7 @@ struct imx233_dma_info_t | |||
154 | bool int_enabled; | 154 | bool int_enabled; |
155 | bool int_cmdcomplt; | 155 | bool int_cmdcomplt; |
156 | bool int_error; | 156 | bool int_error; |
157 | int nr_unaligned; | ||
157 | }; | 158 | }; |
158 | 159 | ||
159 | #define APBH_DMA_CHANNEL(i) i | 160 | #define APBH_DMA_CHANNEL(i) i |
@@ -168,6 +169,7 @@ struct imx233_dma_info_t | |||
168 | #define APB_NAND(dev) APBH_DMA_CHANNEL(HW_APBH_NAND(dev)) | 169 | #define APB_NAND(dev) APBH_DMA_CHANNEL(HW_APBH_NAND(dev)) |
169 | 170 | ||
170 | #define HW_APB_CHx_CMD__COMMAND_BM 0x3 | 171 | #define HW_APB_CHx_CMD__COMMAND_BM 0x3 |
172 | #define HW_APB_CHx_CMD__COMMAND_BP 0 | ||
171 | #define HW_APB_CHx_CMD__COMMAND__NO_XFER 0 | 173 | #define HW_APB_CHx_CMD__COMMAND__NO_XFER 0 |
172 | #define HW_APB_CHx_CMD__COMMAND__WRITE 1 | 174 | #define HW_APB_CHx_CMD__COMMAND__WRITE 1 |
173 | #define HW_APB_CHx_CMD__COMMAND__READ 2 | 175 | #define HW_APB_CHx_CMD__COMMAND__READ 2 |
@@ -180,7 +182,7 @@ struct imx233_dma_info_t | |||
180 | #define HW_APB_CHx_CMD__SEMAPHORE (1 << 6) | 182 | #define HW_APB_CHx_CMD__SEMAPHORE (1 << 6) |
181 | #define HW_APB_CHx_CMD__WAIT4ENDCMD (1 << 7) | 183 | #define HW_APB_CHx_CMD__WAIT4ENDCMD (1 << 7) |
182 | /* An errata advise not to use it */ | 184 | /* An errata advise not to use it */ |
183 | //#define HW_APB_CHx_CMD__HALTONTERMINATE (1 << 8) | 185 | #define HW_APB_CHx_CMD__HALTONTERMINATE (1 << 8) |
184 | #define HW_APB_CHx_CMD__CMDWORDS_BM 0xf000 | 186 | #define HW_APB_CHx_CMD__CMDWORDS_BM 0xf000 |
185 | #define HW_APB_CHx_CMD__CMDWORDS_BP 12 | 187 | #define HW_APB_CHx_CMD__CMDWORDS_BP 12 |
186 | #define HW_APB_CHx_CMD__XFER_COUNT_BM 0xffff0000 | 188 | #define HW_APB_CHx_CMD__XFER_COUNT_BM 0xffff0000 |
@@ -193,8 +195,9 @@ struct imx233_dma_info_t | |||
193 | #define HW_APB_CHx_SEMA__PHORE_BM 0xff0000 | 195 | #define HW_APB_CHx_SEMA__PHORE_BM 0xff0000 |
194 | #define HW_APB_CHx_SEMA__PHORE_BP 16 | 196 | #define HW_APB_CHx_SEMA__PHORE_BP 16 |
195 | 197 | ||
196 | /* A single descriptor cannot transfer more than 2^16 bytes */ | 198 | /* A single descriptor cannot transfer more than 2^16 bytes but because of the |
197 | #define IMX233_MAX_SINGLE_DMA_XFER_SIZE (1 << 16) | 199 | * weird 0=64KiB, it's safer to restrict to 2^15 */ |
200 | #define IMX233_MAX_SINGLE_DMA_XFER_SIZE (1 << 15) | ||
198 | 201 | ||
199 | void imx233_dma_init(void); | 202 | void imx233_dma_init(void); |
200 | void imx233_dma_reset_channel(unsigned chan); | 203 | void imx233_dma_reset_channel(unsigned chan); |
@@ -208,7 +211,8 @@ void imx233_dma_clear_channel_interrupt(unsigned chan); | |||
208 | bool imx233_dma_is_channel_error_irq(unsigned chan); | 211 | bool imx233_dma_is_channel_error_irq(unsigned chan); |
209 | /* assume no command is in progress */ | 212 | /* assume no command is in progress */ |
210 | void imx233_dma_start_command(unsigned chan, struct apb_dma_command_t *cmd); | 213 | void imx233_dma_start_command(unsigned chan, struct apb_dma_command_t *cmd); |
211 | void imx233_dma_wait_completion(unsigned chan); | 214 | /* return value of the semaphore */ |
215 | int imx233_dma_wait_completion(unsigned chan, unsigned tmo); | ||
212 | /* get some info | 216 | /* get some info |
213 | * WARNING: if channel is not freezed, data might not be coherent ! */ | 217 | * WARNING: if channel is not freezed, data might not be coherent ! */ |
214 | struct imx233_dma_info_t imx233_dma_get_info(unsigned chan, unsigned flags); | 218 | struct imx233_dma_info_t imx233_dma_get_info(unsigned chan, unsigned flags); |