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Diffstat (limited to 'firmware/target/arm/imx233/dma-imx233.c')
-rw-r--r--firmware/target/arm/imx233/dma-imx233.c81
1 files changed, 76 insertions, 5 deletions
diff --git a/firmware/target/arm/imx233/dma-imx233.c b/firmware/target/arm/imx233/dma-imx233.c
index 97001210d2..8dac284a38 100644
--- a/firmware/target/arm/imx233/dma-imx233.c
+++ b/firmware/target/arm/imx233/dma-imx233.c
@@ -24,6 +24,8 @@
24#include "config.h" 24#include "config.h"
25#include "system.h" 25#include "system.h"
26#include "dma-imx233.h" 26#include "dma-imx233.h"
27#include "lcd.h"
28#include "string.h"
27 29
28void imx233_dma_init(void) 30void imx233_dma_init(void)
29{ 31{
@@ -34,12 +36,22 @@ void imx233_dma_init(void)
34 36
35void imx233_dma_reset_channel(unsigned chan) 37void imx233_dma_reset_channel(unsigned chan)
36{ 38{
39 volatile uint32_t *ptr;
40 uint32_t bm;
37 if(APB_IS_APBX_CHANNEL(chan)) 41 if(APB_IS_APBX_CHANNEL(chan))
38 __REG_SET(HW_APBX_CHANNEL_CTRL) = 42 {
39 HW_APBX_CHANNEL_CTRL__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan)); 43 ptr = &HW_APBX_CHANNEL_CTRL;
44 bm = HW_APBX_CHANNEL_CTRL__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan));
45 }
40 else 46 else
41 __REG_SET(HW_APBH_CTRL0) = 47 {
42 HW_APBH_CTRL0__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan)); 48 ptr = &HW_APBH_CTRL0;
49 bm = HW_APBH_CTRL0__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan));
50 }
51 __REG_SET(*ptr) = bm;
52 /* wait for end of reset */
53 while(*ptr & bm)
54 ;
43} 55}
44 56
45void imx233_dma_clkgate_channel(unsigned chan, bool enable_clock) 57void imx233_dma_clkgate_channel(unsigned chan, bool enable_clock)
@@ -54,6 +66,27 @@ void imx233_dma_clkgate_channel(unsigned chan, bool enable_clock)
54 HW_APBH_CTRL0__CLKGATE_CHANNEL(APB_GET_DMA_CHANNEL(chan)); 66 HW_APBH_CTRL0__CLKGATE_CHANNEL(APB_GET_DMA_CHANNEL(chan));
55} 67}
56 68
69void imx233_dma_freeze_channel(unsigned chan, bool freeze)
70{
71 volatile uint32_t *ptr;
72 uint32_t bm;
73 if(APB_IS_APBX_CHANNEL(chan))
74 {
75 ptr = &HW_APBX_CHANNEL_CTRL;
76 bm = HW_APBX_CHANNEL_CTRL__FREEZE_CHANNEL(APB_GET_DMA_CHANNEL(chan));
77 }
78 else
79 {
80 ptr = &HW_APBH_CTRL0;
81 bm = HW_APBH_CTRL0__FREEZE_CHANNEL(APB_GET_DMA_CHANNEL(chan));
82 }
83
84 if(freeze)
85 __REG_SET(*ptr) = bm;
86 else
87 __REG_CLR(*ptr) = bm;
88}
89
57void imx233_dma_enable_channel_interrupt(unsigned chan, bool enable) 90void imx233_dma_enable_channel_interrupt(unsigned chan, bool enable)
58{ 91{
59 volatile uint32_t *ptr; 92 volatile uint32_t *ptr;
@@ -65,7 +98,7 @@ void imx233_dma_enable_channel_interrupt(unsigned chan, bool enable)
65 } 98 }
66 else 99 else
67 { 100 {
68 ptr = &HW_APBH_CTRL1;; 101 ptr = &HW_APBH_CTRL1;
69 bm = HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ_EN(APB_GET_DMA_CHANNEL(chan)); 102 bm = HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ_EN(APB_GET_DMA_CHANNEL(chan));
70 } 103 }
71 104
@@ -186,3 +219,41 @@ void imx233_dma_wait_completion(unsigned chan)
186 while(*sema & HW_APB_CHx_SEMA__PHORE_BM) 219 while(*sema & HW_APB_CHx_SEMA__PHORE_BM)
187 yield(); 220 yield();
188} 221}
222
223struct imx233_dma_info_t imx233_dma_get_info(unsigned chan, unsigned flags)
224{
225 struct imx233_dma_info_t s;
226 memset(&s, 0, sizeof(s));
227 bool apbx = APB_IS_APBX_CHANNEL(chan);
228 int dmac = APB_GET_DMA_CHANNEL(chan);
229 if(flags & DMA_INFO_CURCMDADDR)
230 s.cur_cmd_addr = apbx ? HW_APBX_CHx_CURCMDAR(dmac) : HW_APBH_CHx_CURCMDAR(dmac);
231 if(flags & DMA_INFO_NXTCMDADDR)
232 s.nxt_cmd_addr = apbx ? HW_APBX_CHx_NXTCMDAR(dmac) : HW_APBH_CHx_NXTCMDAR(dmac);
233 if(flags & DMA_INFO_CMD)
234 s.cmd = apbx ? HW_APBX_CHx_CMD(dmac) : HW_APBH_CHx_CMD(dmac);
235 if(flags & DMA_INFO_BAR)
236 s.bar = apbx ? HW_APBX_CHx_BAR(dmac) : HW_APBH_CHx_BAR(dmac);
237 if(flags & DMA_INFO_AHB_BYTES)
238 s.ahb_bytes = apbx ? __XTRACT_EX(HW_APBX_CHx_DEBUG2(dmac), HW_APBX_CHx_DEBUG2__AHB_BYTES) :
239 __XTRACT_EX(HW_APBH_CHx_DEBUG2(dmac), HW_APBH_CHx_DEBUG2__AHB_BYTES);
240 if(flags & DMA_INFO_APB_BYTES)
241 s.apb_bytes = apbx ? __XTRACT_EX(HW_APBX_CHx_DEBUG2(dmac), HW_APBX_CHx_DEBUG2__APB_BYTES) :
242 __XTRACT_EX(HW_APBH_CHx_DEBUG2(dmac), HW_APBH_CHx_DEBUG2__APB_BYTES);
243 if(flags & DMA_INFO_FREEZED)
244 s.freezed = apbx ? HW_APBX_CHANNEL_CTRL & HW_APBX_CHANNEL_CTRL__FREEZE_CHANNEL(dmac) :
245 HW_APBH_CTRL0 & HW_APBH_CTRL0__FREEZE_CHANNEL(dmac);
246 if(flags & DMA_INFO_GATED)
247 s.gated = apbx ? false : HW_APBH_CTRL0 & HW_APBH_CTRL0__CLKGATE_CHANNEL(dmac);
248 if(flags & DMA_INFO_INTERRUPT)
249 {
250 s.int_enabled = apbx ? HW_APBX_CTRL1 & HW_APBX_CTRL1__CHx_CMDCMPLT_IRQ_EN(dmac) :
251 HW_APBH_CTRL1 & HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ_EN(dmac);
252 s.int_cmdcomplt = apbx ? HW_APBX_CTRL1 & HW_APBX_CTRL1__CHx_CMDCMPLT_IRQ(dmac) :
253 HW_APBH_CTRL1 & HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ(dmac);
254 s.int_error = apbx ? HW_APBX_CTRL2 & HW_APBX_CTRL2__CHx_ERROR_IRQ(dmac) :
255 HW_APBH_CTRL2 & HW_APBH_CTRL2__CHx_ERROR_IRQ(dmac);
256 }
257 return s;
258}
259