diff options
Diffstat (limited to 'firmware/target/arm/imx233/clkctrl-imx233.h')
-rw-r--r-- | firmware/target/arm/imx233/clkctrl-imx233.h | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.h b/firmware/target/arm/imx233/clkctrl-imx233.h index 1533b52cce..2a12129171 100644 --- a/firmware/target/arm/imx233/clkctrl-imx233.h +++ b/firmware/target/arm/imx233/clkctrl-imx233.h | |||
@@ -27,15 +27,34 @@ | |||
27 | 27 | ||
28 | #define HW_CLKCTRL_BASE 0x80040000 | 28 | #define HW_CLKCTRL_BASE 0x80040000 |
29 | 29 | ||
30 | #define HW_CLKCTRL_PLLCTRL0 (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x0)) | ||
31 | #define HW_CLKCTRL_PLLCTRL0__DIV_SEL_BP 20 | ||
32 | #define HW_CLKCTRL_PLLCTRL0__DIV_SEL_BM (3 << 20) | ||
33 | |||
34 | #define HW_CLKCTRL_PLLCTRL1 (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x10)) | ||
35 | |||
36 | #define HW_CLKCTRL_CPU (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x20)) | ||
37 | #define HW_CLKCTRL_CPU__DIV_CPU_BP 0 | ||
38 | #define HW_CLKCTRL_CPU__DIV_CPU_BM 0x3f | ||
39 | #define HW_CLKCTRL_CPU__BUSY_REF_CPU (1 << 28) | ||
40 | |||
41 | #define HW_CLKCTRL_HBUS (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x30)) | ||
42 | #define HW_CLKCTRL_HBUS__DIV_BP 0 | ||
43 | #define HW_CLKCTRL_HBUS__DIV_BM 0x1f | ||
44 | |||
30 | #define HW_CLKCTRL_XTAL (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x50)) | 45 | #define HW_CLKCTRL_XTAL (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x50)) |
31 | #define HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE (1 << 26) | 46 | #define HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE (1 << 26) |
32 | 47 | ||
33 | #define HW_CLKCTRL_PIX (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x60)) | 48 | #define HW_CLKCTRL_PIX (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x60)) |
49 | #define HW_CLKCTRL_PIX__DIV_BM 0xfff | ||
50 | |||
34 | #define HW_CLKCTRL_SSP (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x70)) | 51 | #define HW_CLKCTRL_SSP (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x70)) |
52 | #define HW_CLKCTRL_SSP__DIV_BM 0x1ff | ||
35 | 53 | ||
36 | #define HW_CLKCTRL_CLKSEQ (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x110)) | 54 | #define HW_CLKCTRL_CLKSEQ (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x110)) |
37 | #define HW_CLKCTRL_CLKSEQ__BYPASS_PIX (1 << 1) | 55 | #define HW_CLKCTRL_CLKSEQ__BYPASS_PIX (1 << 1) |
38 | #define HW_CLKCTRL_CLKSEQ__BYPASS_SSP (1 << 5) | 56 | #define HW_CLKCTRL_CLKSEQ__BYPASS_SSP (1 << 5) |
57 | #define HW_CLKCTRL_CLKSEQ__BYPASS_CPU (1 << 7) | ||
39 | 58 | ||
40 | #define HW_CLKCTRL_FRAC (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0xf0)) | 59 | #define HW_CLKCTRL_FRAC (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0xf0)) |
41 | #define HW_CLKCTRL_FRAC_CPU (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf0)) | 60 | #define HW_CLKCTRL_FRAC_CPU (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf0)) |
@@ -52,9 +71,11 @@ | |||
52 | 71 | ||
53 | enum imx233_clock_t | 72 | enum imx233_clock_t |
54 | { | 73 | { |
55 | CLK_PIX, | 74 | CLK_PIX, /* div, frac */ |
56 | CLK_SSP, | 75 | CLK_SSP, /* div, frac */ |
57 | CLK_IO, | 76 | CLK_IO, /* div */ |
77 | CLK_CPU, /* div, frac */ | ||
78 | CLK_AHB /* div */ | ||
58 | }; | 79 | }; |
59 | 80 | ||
60 | void imx233_enable_timrot_xtal_clk32k(bool enable); | 81 | void imx233_enable_timrot_xtal_clk32k(bool enable); |