diff options
Diffstat (limited to 'firmware/target/arm/imx233/boot.lds')
-rw-r--r-- | firmware/target/arm/imx233/boot.lds | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/firmware/target/arm/imx233/boot.lds b/firmware/target/arm/imx233/boot.lds index fb6ffdcf23..206e0bb99f 100644 --- a/firmware/target/arm/imx233/boot.lds +++ b/firmware/target/arm/imx233/boot.lds | |||
@@ -6,28 +6,35 @@ OUTPUT_FORMAT(elf32-littlearm) | |||
6 | OUTPUT_ARCH(arm) | 6 | OUTPUT_ARCH(arm) |
7 | STARTUP(target/arm/imx233/crt0.o) | 7 | STARTUP(target/arm/imx233/crt0.o) |
8 | 8 | ||
9 | /* Leave a hole at the beginning of the RAM to load the firmware */ | ||
10 | #define RAM_HOLE 1024 * 1024 | ||
11 | |||
12 | /* Make a difference between virtual and physical address so that we can use | ||
13 | * the resulting elf file with the elftosb tools which loads at the *physical* | ||
14 | * address */ | ||
15 | |||
9 | MEMORY | 16 | MEMORY |
10 | { | 17 | { |
11 | IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE | 18 | IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE |
12 | DRAM : ORIGIN = CACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE | 19 | DRAM : ORIGIN = CACHED_DRAM_ADDR + RAM_HOLE, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE - RAM_HOLE |
13 | UNCACHED_DRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE | 20 | UDRAM : ORIGIN = UNCACHED_DRAM_ADDR + RAM_HOLE, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE - RAM_HOLE |
14 | } | 21 | } |
15 | 22 | ||
16 | SECTIONS | 23 | SECTIONS |
17 | { | 24 | { |
25 | loadaddress = UNCACHED_DRAM_ADDR; | ||
26 | _loadaddress = UNCACHED_DRAM_ADDR; | ||
27 | loadaddressend = UNCACHED_DRAM_ADDR + RAM_HOLE; | ||
28 | _loadaddressend = UNCACHED_DRAM_ADDR + RAM_HOLE; | ||
29 | |||
18 | .text : | 30 | .text : |
19 | { | 31 | { |
20 | *(.text*) | 32 | *(.text*) |
21 | } > DRAM | ||
22 | |||
23 | .data : | ||
24 | { | ||
25 | *(.data*) | 33 | *(.data*) |
26 | *(.rodata*) | 34 | *(.rodata*) |
27 | _dataend = . ; | ||
28 | } > DRAM | 35 | } > DRAM |
29 | 36 | ||
30 | .iram : | 37 | .itext : |
31 | { | 38 | { |
32 | _iramstart = .; // always 0 | 39 | _iramstart = .; // always 0 |
33 | *(.vectors) | 40 | *(.vectors) |
@@ -39,7 +46,7 @@ SECTIONS | |||
39 | _iramend = .; | 46 | _iramend = .; |
40 | } > IRAM AT> DRAM | 47 | } > IRAM AT> DRAM |
41 | 48 | ||
42 | _iramcopy = LOADADDR(.iram); | 49 | _iramcopy = LOADADDR(.itext); |
43 | 50 | ||
44 | .ibss (NOLOAD) : | 51 | .ibss (NOLOAD) : |
45 | { | 52 | { |
@@ -58,6 +65,9 @@ SECTIONS | |||
58 | stackend = .; | 65 | stackend = .; |
59 | } > DRAM | 66 | } > DRAM |
60 | 67 | ||
68 | /* physical address of the stack */ | ||
69 | stackend_phys = stackend - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR; | ||
70 | |||
61 | /* treat .bss and .ncbss as a single section */ | 71 | /* treat .bss and .ncbss as a single section */ |
62 | .bss (NOLOAD) : | 72 | .bss (NOLOAD) : |
63 | { | 73 | { |
@@ -73,7 +83,7 @@ SECTIONS | |||
73 | . = ALIGN(CACHEALIGN_SIZE); | 83 | . = ALIGN(CACHEALIGN_SIZE); |
74 | } AT> DRAM | 84 | } AT> DRAM |
75 | 85 | ||
76 | .bssendadr . - UNCACHED_DRAM_ADDR + CACHED_DRAM_ADDR (NOLOAD) : | 86 | .bssendadr (NOLOAD) : |
77 | { | 87 | { |
78 | _end = .; | 88 | _end = .; |
79 | } > DRAM | 89 | } > DRAM |