diff options
Diffstat (limited to 'firmware/target/arm/gigabeat/meg-fx')
5 files changed, 49 insertions, 29 deletions
diff --git a/firmware/target/arm/gigabeat/meg-fx/ata-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/ata-meg-fx.c index 8e246045e6..00b5e09ed3 100644 --- a/firmware/target/arm/gigabeat/meg-fx/ata-meg-fx.c +++ b/firmware/target/arm/gigabeat/meg-fx/ata-meg-fx.c | |||
@@ -53,10 +53,11 @@ void ata_device_init(void) | |||
53 | { | 53 | { |
54 | } | 54 | } |
55 | 55 | ||
56 | #if !defined(BOOTLOADER) | ||
56 | void copy_read_sectors(unsigned char* buf, int wordcount) | 57 | void copy_read_sectors(unsigned char* buf, int wordcount) |
57 | { | 58 | { |
58 | __buttonlight_trigger(); | 59 | __buttonlight_trigger(); |
59 | 60 | ||
60 | /* Unaligned transfer - slow copy */ | 61 | /* Unaligned transfer - slow copy */ |
61 | if ( (unsigned long)buf & 1) | 62 | if ( (unsigned long)buf & 1) |
62 | { /* not 16-bit aligned, copy byte by byte */ | 63 | { /* not 16-bit aligned, copy byte by byte */ |
@@ -94,7 +95,9 @@ void copy_read_sectors(unsigned char* buf, int wordcount) | |||
94 | DISRC0 = (int) 0x18000000; | 95 | DISRC0 = (int) 0x18000000; |
95 | DISRCC0 = 0x1; | 96 | DISRCC0 = 0x1; |
96 | /* Dest mapped to physical address, on AHB bus, increment */ | 97 | /* Dest mapped to physical address, on AHB bus, increment */ |
97 | DIDST0 = (int) (buf + 0x30000000); | 98 | DIDST0 = (int) buf; |
99 | if(DIDST0 < 0x30000000) | ||
100 | DIDST0 += 0x30000000; | ||
98 | DIDSTC0 = 0; | 101 | DIDSTC0 = 0; |
99 | 102 | ||
100 | /* DACK/DREQ Sync to AHB, Int on Transfer complete, Whole service, No reload, 16-bit transfers */ | 103 | /* DACK/DREQ Sync to AHB, Int on Transfer complete, Whole service, No reload, 16-bit transfers */ |
@@ -112,10 +115,10 @@ void copy_read_sectors(unsigned char* buf, int wordcount) | |||
112 | 115 | ||
113 | /* Wait for transfer to complete */ | 116 | /* Wait for transfer to complete */ |
114 | while((DSTAT0 & 0x000fffff)) | 117 | while((DSTAT0 & 0x000fffff)) |
115 | CLKCON |= (1 << 2); /* set IDLE bit */ | 118 | yield(); |
116 | /* Dump cache for the buffer */ | 119 | /* Dump cache for the buffer */ |
117 | } | 120 | } |
118 | 121 | #endif | |
119 | void dma0(void) | 122 | void dma0(void) |
120 | { | 123 | { |
121 | } | 124 | } |
diff --git a/firmware/target/arm/gigabeat/meg-fx/backlight-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/backlight-meg-fx.c index f6a8d31c7b..2f96584515 100644 --- a/firmware/target/arm/gigabeat/meg-fx/backlight-meg-fx.c +++ b/firmware/target/arm/gigabeat/meg-fx/backlight-meg-fx.c | |||
@@ -123,8 +123,8 @@ bool __backlight_init(void) | |||
123 | 123 | ||
124 | buttonlight_selected = 0x04; | 124 | buttonlight_selected = 0x04; |
125 | 125 | ||
126 | /* delay 2 seconds before any fading */ | 126 | /* delay 4 seconds before any fading */ |
127 | initial_tick_delay = 2000; | 127 | initial_tick_delay = 400; |
128 | /* put the led control on the tick list */ | 128 | /* put the led control on the tick list */ |
129 | tick_add_task(led_control_service); | 129 | tick_add_task(led_control_service); |
130 | 130 | ||
@@ -272,10 +272,10 @@ void __buttonlight_mode(enum buttonlight_mode mode, | |||
272 | */ | 272 | */ |
273 | static void led_control_service(void) | 273 | static void led_control_service(void) |
274 | { | 274 | { |
275 | if(initial_tick_delay) { | 275 | if(initial_tick_delay) { |
276 | initial_tick_delay--; | 276 | initial_tick_delay--; |
277 | return; | 277 | return; |
278 | } | 278 | } |
279 | switch (backlight_control) | 279 | switch (backlight_control) |
280 | { | 280 | { |
281 | case BACKLIGHT_CONTROL_IDLE: | 281 | case BACKLIGHT_CONTROL_IDLE: |
diff --git a/firmware/target/arm/gigabeat/meg-fx/lcd-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/lcd-meg-fx.c index 778e049dd5..c3a17e16cb 100644 --- a/firmware/target/arm/gigabeat/meg-fx/lcd-meg-fx.c +++ b/firmware/target/arm/gigabeat/meg-fx/lcd-meg-fx.c | |||
@@ -29,21 +29,37 @@ bool lcd_enabled() | |||
29 | return lcd_on; | 29 | return lcd_on; |
30 | } | 30 | } |
31 | 31 | ||
32 | unsigned int LCDBANK(unsigned int address) | ||
33 | { | ||
34 | return ((address >> 22) & 0xff); | ||
35 | } | ||
36 | |||
37 | unsigned int LCDBASEU(unsigned int address) | ||
38 | { | ||
39 | return (address & ((1 << 22)-1)) >> 1; | ||
40 | } | ||
41 | |||
42 | unsigned int LCDBASEL(unsigned int address) | ||
43 | { | ||
44 | address += 320*240*2; | ||
45 | return (address & ((1 << 22)-1)) >> 1; | ||
46 | } | ||
47 | |||
48 | |||
32 | /* LCD init */ | 49 | /* LCD init */ |
33 | void lcd_init_device(void) | 50 | void lcd_init_device(void) |
34 | { | 51 | { |
35 | memset16(fg_pattern_blit, fg_pattern, sizeof(fg_pattern_blit)/2); | 52 | LCDSADDR1 = (LCDBANK((unsigned)FRAME) << 21) | (LCDBASEU((unsigned)FRAME)); |
36 | memset16(bg_pattern_blit, bg_pattern, sizeof(bg_pattern_blit)/2); | 53 | LCDSADDR2 = LCDBASEL((unsigned)FRAME); |
37 | clean_dcache_range((void *)fg_pattern_blit, sizeof(fg_pattern_blit)); | 54 | LCDSADDR3 = 0x000000F0; |
38 | clean_dcache_range((void *)bg_pattern_blit, sizeof(bg_pattern_blit)); | ||
39 | |||
40 | LCDSADDR1 = 0x18F00000; /* These values are pulled from an F40 */ | ||
41 | LCDSADDR2 = 0x00112C00; /* They should move FRAME to the correct location */ | ||
42 | LCDSADDR3 = 0x000000F0; /* TODO: Move FRAME to where we want it */ | ||
43 | 55 | ||
44 | LCDCON5 |= 1 << 11; /* Switch from 555I mode to 565 mode */ | 56 | LCDCON5 |= 1 << 11; /* Switch from 555I mode to 565 mode */ |
45 | 57 | ||
46 | #if !defined(BOOTLOADER) | 58 | #if !defined(BOOTLOADER) |
59 | memset16(fg_pattern_blit, fg_pattern, sizeof(fg_pattern_blit)/2); | ||
60 | memset16(bg_pattern_blit, bg_pattern, sizeof(bg_pattern_blit)/2); | ||
61 | clean_dcache_range((void *)fg_pattern_blit, sizeof(fg_pattern_blit)); | ||
62 | clean_dcache_range((void *)bg_pattern_blit, sizeof(bg_pattern_blit)); | ||
47 | use_dma_blit = true; | 63 | use_dma_blit = true; |
48 | lcd_poweroff = true; | 64 | lcd_poweroff = true; |
49 | #endif | 65 | #endif |
@@ -66,7 +82,7 @@ void lcd_update_rect(int x, int y, int width, int height) | |||
66 | { | 82 | { |
67 | /* Wait for this controller to stop pending transfer */ | 83 | /* Wait for this controller to stop pending transfer */ |
68 | while((DSTAT1 & 0x000fffff)) | 84 | while((DSTAT1 & 0x000fffff)) |
69 | CLKCON |= (1 << 2); /* set IDLE bit */ | 85 | yield(); |
70 | 86 | ||
71 | /* Flush DCache */ | 87 | /* Flush DCache */ |
72 | invalidate_dcache_range((void *)(((int) &lcd_framebuffer)+(y * sizeof(fb_data) * LCD_WIDTH)), (height * sizeof(fb_data) * LCD_WIDTH)); | 88 | invalidate_dcache_range((void *)(((int) &lcd_framebuffer)+(y * sizeof(fb_data) * LCD_WIDTH)), (height * sizeof(fb_data) * LCD_WIDTH)); |
@@ -92,7 +108,7 @@ void lcd_update_rect(int x, int y, int width, int height) | |||
92 | 108 | ||
93 | /* Wait for transfer to complete */ | 109 | /* Wait for transfer to complete */ |
94 | while((DSTAT1 & 0x000fffff)) | 110 | while((DSTAT1 & 0x000fffff)) |
95 | CLKCON |= (1 << 2); /* set IDLE bit */ | 111 | yield(); |
96 | } | 112 | } |
97 | else | 113 | else |
98 | memcpy(((char*)FRAME) + (y * sizeof(fb_data) * LCD_WIDTH), ((char *)&lcd_framebuffer) + (y * sizeof(fb_data) * LCD_WIDTH), ((height * sizeof(fb_data) * LCD_WIDTH))); | 114 | memcpy(((char*)FRAME) + (y * sizeof(fb_data) * LCD_WIDTH), ((char *)&lcd_framebuffer) + (y * sizeof(fb_data) * LCD_WIDTH), ((height * sizeof(fb_data) * LCD_WIDTH))); |
@@ -143,9 +159,8 @@ void lcd_clear_display_dma(void) | |||
143 | void *src; | 159 | void *src; |
144 | bool inc = false; | 160 | bool inc = false; |
145 | 161 | ||
146 | if(!lcd_on) { | 162 | if(!lcd_on) |
147 | sleep(200); | 163 | yield(); |
148 | } | ||
149 | if (lcd_get_drawmode() & DRMODE_INVERSEVID) | 164 | if (lcd_get_drawmode() & DRMODE_INVERSEVID) |
150 | src = fg_pattern_blit; | 165 | src = fg_pattern_blit; |
151 | else | 166 | else |
@@ -162,7 +177,7 @@ void lcd_clear_display_dma(void) | |||
162 | } | 177 | } |
163 | /* Wait for any pending transfer to complete */ | 178 | /* Wait for any pending transfer to complete */ |
164 | while((DSTAT3 & 0x000fffff)) | 179 | while((DSTAT3 & 0x000fffff)) |
165 | CLKCON |= (1 << 2); /* set IDLE bit */ | 180 | yield(); |
166 | DMASKTRIG3 |= 0x4; /* Stop controller */ | 181 | DMASKTRIG3 |= 0x4; /* Stop controller */ |
167 | DIDST3 = ((int) lcd_framebuffer) + 0x30000000; /* set DMA dest, physical address */ | 182 | DIDST3 = ((int) lcd_framebuffer) + 0x30000000; /* set DMA dest, physical address */ |
168 | DIDSTC3 = 0; /* Dest on AHB, increment */ | 183 | DIDSTC3 = 0; /* Dest on AHB, increment */ |
@@ -182,7 +197,7 @@ void lcd_clear_display_dma(void) | |||
182 | 197 | ||
183 | /* Wait for transfer to complete */ | 198 | /* Wait for transfer to complete */ |
184 | while((DSTAT3 & 0x000fffff)) | 199 | while((DSTAT3 & 0x000fffff)) |
185 | CLKCON |= (1 << 2); /* set IDLE bit */ | 200 | yield(); |
186 | } | 201 | } |
187 | 202 | ||
188 | void lcd_clear_display(void) | 203 | void lcd_clear_display(void) |
diff --git a/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c index 47abb9d46a..8094ff828f 100644 --- a/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c +++ b/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c | |||
@@ -1,6 +1,7 @@ | |||
1 | #include <string.h> | 1 | #include <string.h> |
2 | #include "s3c2440.h" | 2 | #include "s3c2440.h" |
3 | #include "mmu-meg-fx.h" | 3 | #include "mmu-meg-fx.h" |
4 | #include "panic.h" | ||
4 | 5 | ||
5 | void map_memory(void); | 6 | void map_memory(void); |
6 | static void enable_mmu(void); | 7 | static void enable_mmu(void); |
@@ -20,7 +21,7 @@ void map_memory(void) { | |||
20 | enable_mmu(); | 21 | enable_mmu(); |
21 | } | 22 | } |
22 | 23 | ||
23 | unsigned int* ttb_base; | 24 | unsigned int* ttb_base = (unsigned int *) TTB_BASE; |
24 | const int ttb_size = 4096; | 25 | const int ttb_size = 4096; |
25 | 26 | ||
26 | void set_ttb() { | 27 | void set_ttb() { |
@@ -29,7 +30,7 @@ void set_ttb() { | |||
29 | int domain_access; | 30 | int domain_access; |
30 | 31 | ||
31 | /* must be 16Kb (0x4000) aligned */ | 32 | /* must be 16Kb (0x4000) aligned */ |
32 | ttb_base = (int*)0x31F00000; | 33 | ttb_base = (int*) TTB_BASE; |
33 | for (i=0; i<ttb_size; i++,ttbPtr++) | 34 | for (i=0; i<ttb_size; i++,ttbPtr++) |
34 | ttbPtr = 0; | 35 | ttbPtr = 0; |
35 | asm volatile("mcr p15, 0, %0, c2, c0, 0" : : "r" (ttb_base)); | 36 | asm volatile("mcr p15, 0, %0, c2, c0, 0" : : "r" (ttb_base)); |
@@ -47,8 +48,8 @@ void set_page_tables() { | |||
47 | 48 | ||
48 | map_section(0x30000000, 0, 32, CACHE_NONE); /* map RAM to 0 */ | 49 | map_section(0x30000000, 0, 32, CACHE_NONE); /* map RAM to 0 */ |
49 | 50 | ||
50 | map_section(0x30000000, 0, 30, CACHE_ALL); /* cache the first 30 MB or RAM */ | 51 | map_section(0x30000000, 0, 32, CACHE_ALL); /* cache the first 31 MB or RAM */ |
51 | map_section(0x31E00000, 0x31E00000, 1, BUFFERED); /* enable buffered writing for the framebuffer */ | 52 | map_section((int)FRAME, (int)FRAME, 1, BUFFERED); /* enable buffered writing for the framebuffer */ |
52 | } | 53 | } |
53 | 54 | ||
54 | void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags) { | 55 | void map_section(unsigned int pa, unsigned int va, int mb, int cache_flags) { |
diff --git a/firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c index b2b4a6207b..6f48a76452 100644 --- a/firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c +++ b/firmware/target/arm/gigabeat/meg-fx/system-meg-fx.c | |||
@@ -59,6 +59,7 @@ void system_init(void) | |||
59 | 59 | ||
60 | /* Turn off AC97 and Camera */ | 60 | /* Turn off AC97 and Camera */ |
61 | CLKCON &= ~( (1<<19) | (1<<20) ); | 61 | CLKCON &= ~( (1<<19) | (1<<20) ); |
62 | |||
62 | } | 63 | } |
63 | 64 | ||
64 | 65 | ||