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Diffstat (limited to 'firmware/target/arm/as3525')
-rw-r--r--firmware/target/arm/as3525/debug-as3525.c102
1 files changed, 66 insertions, 36 deletions
diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c
index b0ee8efc62..22958c9f22 100644
--- a/firmware/target/arm/as3525/debug-as3525.c
+++ b/firmware/target/arm/as3525/debug-as3525.c
@@ -55,8 +55,8 @@
55#define CLK_I2SI 8 55#define CLK_I2SI 8
56#define CLK_I2SO 9 56#define CLK_I2SO 9
57#define CLK_DBOP 10 57#define CLK_DBOP 10
58#define CLK_SD_IDENT_NAND 11 58#define CLK_SD_MCLK_NAND 11
59#define CLK_SD_IDENT_MSD 12 59#define CLK_SD_MCLK_MSD 12
60#define CLK_USB 13 60#define CLK_USB 13
61 61
62#define I2C2_CPSR0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C)) 62#define I2C2_CPSR0 *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C))
@@ -94,24 +94,24 @@ int calc_freq(int clk)
94 return 0; 94 return 0;
95 95
96 /*assume 24MHz oscillator only input available */ 96 /*assume 24MHz oscillator only input available */
97 out_div = ((CGU_PLLA>>13) & 0x3); /* bits 13:14 */ 97 out_div = ((CGU_PLLA>>13) & 0x3); /* bits 13:14 */
98 if (out_div == 3) /* for 11 NO=4 */ 98 if (out_div == 3) /* for 11 NO=4 */
99 out_div=4; 99 out_div=4;
100 if(out_div) /* NO = 0 not allowed */ 100 if(out_div) /* NO = 0 not allowed */
101 return ((2 * (CGU_PLLA & 0xff))*CLK_MAIN)/ 101 return ((2 * (CGU_PLLA & 0xff))*CLK_MAIN)/
102 (((CGU_PLLA>>8) & 0x1f)*out_div); 102 (((CGU_PLLA>>8) & 0x1f)*out_div);
103 return 0; 103 return 0;
104 case CLK_PLLB: 104 case CLK_PLLB:
105 if(CGU_PLLBSUP & (1<<3)) 105 if(CGU_PLLBSUP & (1<<3))
106 return 0; 106 return 0;
107 107
108 /*assume 24MHz oscillator only input available */ 108 /*assume 24MHz oscillator only input available */
109 out_div = ((CGU_PLLB>>13) & 0x3); /* bits 13:14 */ 109 out_div = ((CGU_PLLB>>13) & 0x3); /* bits 13:14 */
110 if (out_div == 3) /* for 11 NO=4 */ 110 if (out_div == 3) /* for 11 NO=4 */
111 out_div=4; 111 out_div=4;
112 if(out_div) /* NO = 0 not allowed */ 112 if(out_div) /* NO = 0 not allowed */
113 return ((2 * (CGU_PLLB & 0xff))*CLK_MAIN)/ 113 return ((2 * (CGU_PLLB & 0xff))*CLK_MAIN)/
114 (((CGU_PLLB>>8) & 0x1f)*out_div); 114 (((CGU_PLLB>>8) & 0x1f)*out_div);
115 return 0; 115 return 0;
116 case CLK_922T: 116 case CLK_922T:
117 if (!(read_cp15()>>30)) /* fastbus */ 117 if (!(read_cp15()>>30)) /* fastbus */
@@ -121,11 +121,13 @@ int calc_freq(int clk)
121 case CLK_FCLK: 121 case CLK_FCLK:
122 switch(CGU_PROC & 3) { 122 switch(CGU_PROC & 3) {
123 case 0: 123 case 0:
124 return (CLK_MAIN * (8 - prediv)) / (8*(postdiv + 1)); 124 return (CLK_MAIN * (8 - prediv)) / (8 * (postdiv + 1));
125 case 1: 125 case 1:
126 return (calc_freq(CLK_PLLA) * (8 - prediv)) / (8*(postdiv + 1)); 126 return (calc_freq(CLK_PLLA) * (8 - prediv)) /
127 (8 * (postdiv + 1));
127 case 2: 128 case 2:
128 return (calc_freq(CLK_PLLB) * (8 - prediv)) / (8*(postdiv + 1)); 129 return (calc_freq(CLK_PLLB) * (8 - prediv)) /
130 (8 * (postdiv + 1));
129 default: 131 default:
130 return 0; 132 return 0;
131 } 133 }
@@ -181,20 +183,20 @@ int calc_freq(int clk)
181 } 183 }
182 case CLK_DBOP: 184 case CLK_DBOP:
183 return calc_freq(CLK_PCLK)/((CGU_DBOP & 7)+1); 185 return calc_freq(CLK_PCLK)/((CGU_DBOP & 7)+1);
184 case CLK_SD_IDENT_NAND: 186 case CLK_SD_MCLK_NAND:
185 if(!(MCI_NAND & (1<<8))) 187 if(!(MCI_NAND & (1<<8)))
186 return 0; 188 return 0;
187 else if(MCI_NAND & (1<<10)) 189 else if(MCI_NAND & (1<<10))
188 return calc_freq(CLK_PCLK); 190 return calc_freq(CLK_PCLK);
189 else 191 else
190 return calc_freq(CLK_PCLK)/(((MCI_NAND & 0xff)*2)+1); 192 return calc_freq(CLK_PCLK)/(((MCI_NAND & 0xff)+1)*2);
191 case CLK_SD_IDENT_MSD: 193 case CLK_SD_MCLK_MSD:
192 if(!(MCI_SD & (1<<8))) 194 if(!(MCI_SD & (1<<8)))
193 return 0; 195 return 0;
194 else if(MCI_SD & (1<<10)) 196 else if(MCI_SD & (1<<10))
195 return calc_freq(CLK_PCLK); 197 return calc_freq(CLK_PCLK);
196 else 198 else
197 return calc_freq(CLK_PCLK)/(((MCI_SD & 0xff)*2)+1); 199 return calc_freq(CLK_PCLK)/(((MCI_SD & 0xff)+1)*2);
198 case CLK_USB: 200 case CLK_USB:
199 switch(CGU_USB & 3) { /* 0-> div=1 other->div=1/(2*n) */ 201 switch(CGU_USB & 3) { /* 0-> div=1 other->div=1/(2*n) */
200 case 0: 202 case 0:
@@ -224,6 +226,10 @@ bool __dbg_hw_info(void)
224{ 226{
225 char buf[50]; 227 char buf[50];
226 int line; 228 int line;
229 int last_nand = 0;
230#if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
231 int last_sd = 0;
232#endif
227 233
228 lcd_clear_display(); 234 lcd_clear_display();
229 lcd_setfont(FONT_SYSFIXED); 235 lcd_setfont(FONT_SYSFIXED);
@@ -236,10 +242,12 @@ bool __dbg_hw_info(void)
236 line = 0; 242 line = 0;
237 _DEBUG_PRINTF("[Clock Frequencies:]"); 243 _DEBUG_PRINTF("[Clock Frequencies:]");
238 _DEBUG_PRINTF(" SET ACTUAL"); 244 _DEBUG_PRINTF(" SET ACTUAL");
239 _DEBUG_PRINTF("922T:%s %3dMHz", (!(read_cp15()>>30)) ? "FAST " : 245 _DEBUG_PRINTF("922T:%s %3dMHz",
240 (read_cp15()>>31) ? "ASYNC" : "SYNC " , 246 (!(read_cp15()>>30)) ? "FAST " :
241 calc_freq(CLK_922T)/1000000); 247 (read_cp15()>>31) ? "ASYNC" : "SYNC ",
242 _DEBUG_PRINTF("PLLA:%3dMHz %3dMHz", AS3525_PLLA_FREQ/1000000, calc_freq(CLK_PLLA)/1000000); 248 calc_freq(CLK_922T)/1000000);
249 _DEBUG_PRINTF("PLLA:%3dMHz %3dMHz", AS3525_PLLA_FREQ/1000000,
250 calc_freq(CLK_PLLA)/1000000);
243 _DEBUG_PRINTF("PLLB: %3dMHz", calc_freq(CLK_PLLB)/1000000); 251 _DEBUG_PRINTF("PLLB: %3dMHz", calc_freq(CLK_PLLB)/1000000);
244 _DEBUG_PRINTF("FCLK: %3dMHz", calc_freq(CLK_FCLK)/1000000); 252 _DEBUG_PRINTF("FCLK: %3dMHz", calc_freq(CLK_FCLK)/1000000);
245 253
@@ -257,12 +265,18 @@ bool __dbg_hw_info(void)
257 line = 0; 265 line = 0;
258#endif /* LCD_HEIGHT < 176 */ 266#endif /* LCD_HEIGHT < 176 */
259 267
260 _DEBUG_PRINTF("DRAM:%3dMHz %3dMHz", AS3525_PCLK_FREQ/1000000, calc_freq(CLK_EXTMEM)/1000000); 268 _DEBUG_PRINTF("DRAM:%3dMHz %3dMHz", AS3525_PCLK_FREQ/1000000,
261 _DEBUG_PRINTF("PCLK:%3dMHz %3dMHz", AS3525_PCLK_FREQ/1000000, calc_freq(CLK_PCLK)/1000000); 269 calc_freq(CLK_EXTMEM)/1000000);
262 _DEBUG_PRINTF("IDE :%3dMHz %3dMHz", AS3525_IDE_FREQ/1000000,calc_freq(CLK_IDE)/1000000); 270 _DEBUG_PRINTF("PCLK:%3dMHz %3dMHz", AS3525_PCLK_FREQ/1000000,
263 _DEBUG_PRINTF("DBOP:%3dMHz %3dMHz", AS3525_DBOP_FREQ/1000000,calc_freq(CLK_DBOP)/1000000); 271 calc_freq(CLK_PCLK)/1000000);
264 _DEBUG_PRINTF("I2C :%3dkHz %3dkHz", AS3525_I2C_FREQ/1000,calc_freq(CLK_I2C)/1000); 272 _DEBUG_PRINTF("IDE :%3dMHz %3dMHz", AS3525_IDE_FREQ/1000000,
265 _DEBUG_PRINTF("I2SI: %s %3dMHz", (CGU_AUDIO & (1<<23)) ? "on " : "off" ,calc_freq(CLK_I2SI)/1000000); 273 calc_freq(CLK_IDE)/1000000);
274 _DEBUG_PRINTF("DBOP:%3dMHz %3dMHz", AS3525_DBOP_FREQ/1000000,
275 calc_freq(CLK_DBOP)/1000000);
276 _DEBUG_PRINTF("I2C :%3dkHz %3dkHz", AS3525_I2C_FREQ/1000,
277 calc_freq(CLK_I2C)/1000);
278 _DEBUG_PRINTF("I2SI: %s %3dMHz", (CGU_AUDIO & (1<<23)) ?
279 "on " : "off" , calc_freq(CLK_I2SI)/1000000);
266 280
267#if LCD_HEIGHT < 176 /* clip */ 281#if LCD_HEIGHT < 176 /* clip */
268 lcd_update(); 282 lcd_update();
@@ -278,14 +292,29 @@ bool __dbg_hw_info(void)
278 line = 0; 292 line = 0;
279#endif /* LCD_HEIGHT < 176 */ 293#endif /* LCD_HEIGHT < 176 */
280 294
281 _DEBUG_PRINTF("I2SO: %s %3dMHz", (CGU_AUDIO & (1<<11)) ? "on " : "off", calc_freq(CLK_I2SO)/1000000); 295 _DEBUG_PRINTF("I2SO: %s %3dMHz", (CGU_AUDIO & (1<<11)) ?
282 _DEBUG_PRINTF("SD :%3dkHz %3dkHz", AS3525_SD_IDENT_FREQ/1000,calc_freq(CLK_SD_IDENT_NAND)/1000); 296 "on " : "off", calc_freq(CLK_I2SO)/1000000);
283 _DEBUG_PRINTF("MSD :%3dkHz %3dkHz", AS3525_SD_IDENT_FREQ/1000,calc_freq(CLK_SD_IDENT_MSD)/1000); 297 if(MCI_NAND)
284 _DEBUG_PRINTF("USB: %3dMHz", calc_freq(CLK_USB)/1000000); 298 last_nand = MCI_NAND;
285 _DEBUG_PRINTF("MMU: %s CVDDP:%4d", (read_cp15() & CP15_MMU) ? " op" : "nop", 299 /* MCLK == PCLK */
286 adc_read(ADC_CVDD) * 25); 300 _DEBUG_PRINTF("SD :%3dMHz %3dMHz",
287 _DEBUG_PRINTF("Icache:%s Dcache:%s",(read_cp15() & CP15_IC) ? " op" : "nop", 301 ((last_nand ? (AS3525_PCLK_FREQ/ 1000000): 0) /
288 (read_cp15() & CP15_DC) ? " op" : "nop"); 302 ((last_nand & MCI_CLOCK_BYPASS)? 1:(((last_nand & 0xff)+1) * 2))),
303 calc_freq(CLK_SD_MCLK_NAND)/1000000);
304#if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
305 if(MCI_SD)
306 last_sd = MCI_SD;
307 _DEBUG_PRINTF("uSD :%3dMHz %3dMHz",
308 ((last_sd ? (AS3525_PCLK_FREQ/ 1000000): 0) /
309 ((last_sd & MCI_CLOCK_BYPASS) ? 1: (((last_sd & 0xff) + 1) * 2))),
310 calc_freq(CLK_SD_MCLK_MSD)/1000000);
311#endif
312 _DEBUG_PRINTF("USB : %3dMHz", calc_freq(CLK_USB)/1000000);
313 _DEBUG_PRINTF("MMU : %s CVDDP:%4d", (read_cp15() & CP15_MMU) ?
314 " on" : "off", adc_read(ADC_CVDD) * 25);
315 _DEBUG_PRINTF("Icache:%s Dcache:%s",
316 (read_cp15() & CP15_IC) ? " on" : "off",
317 (read_cp15() & CP15_DC) ? " on" : "off");
289 318
290 lcd_update(); 319 lcd_update();
291 int btn = button_get_w_tmo(HZ/10); 320 int btn = button_get_w_tmo(HZ/10);
@@ -322,7 +351,8 @@ bool __dbg_hw_info(void)
322 351
323 _DEBUG_PRINTF("CGU_AUDIO :%8x", (unsigned int)(CGU_AUDIO)); 352 _DEBUG_PRINTF("CGU_AUDIO :%8x", (unsigned int)(CGU_AUDIO));
324 _DEBUG_PRINTF("CGU_USB :%8x", (unsigned int)(CGU_USB)); 353 _DEBUG_PRINTF("CGU_USB :%8x", (unsigned int)(CGU_USB));
325 _DEBUG_PRINTF("I2C2_CPSR :%8x", (unsigned int)(I2C2_CPSR1<<8 | I2C2_CPSR0)); 354 _DEBUG_PRINTF("I2C2_CPSR :%8x", (unsigned int)(I2C2_CPSR1<<8 |
355 I2C2_CPSR0));
326 _DEBUG_PRINTF("MCI_NAND :%8x", (unsigned int)(MCI_NAND)); 356 _DEBUG_PRINTF("MCI_NAND :%8x", (unsigned int)(MCI_NAND));
327 _DEBUG_PRINTF("MCI_SD :%8x", (unsigned int)(MCI_SD)); 357 _DEBUG_PRINTF("MCI_SD :%8x", (unsigned int)(MCI_SD));
328 358