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Diffstat (limited to 'firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S')
-rw-r--r--firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S45
1 files changed, 15 insertions, 30 deletions
diff --git a/firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S b/firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S
index 4281519491..23f1db3109 100644
--- a/firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S
+++ b/firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S
@@ -56,42 +56,27 @@ lcd_grey_data:
56 ldr lr, =DBOP_BASE 56 ldr lr, =DBOP_BASE
57 57
58.greyloop: 58.greyloop:
59 ldmia r1, {r3-r4} /* Fetch 8 pixel phases */ 59 ldmia r1, {r3-r4}
60 ldmia r0!, {r5-r6} /* Fetch 8 pixel values */ 60
61 61 and r5, r12, r3 @ r5 = 3.......2.......1.......0.......
62 mov r7, #0 62 and r6, r12, r4 @ r6 = 7.......6.......5.......4.......
63 63 orr r5, r5, r6, lsr #4 @ r5 = 3...7...2...6...1...5...0...4...
64 /* set bits 7..3 */ 64 orr r5, r5, r5, lsr #9 @ r5 = 3...7...23..67..12..56..01..45..
65 tst r3, #0x80 65 orr r5, r5, r5, lsr #9 @ r5 = 3...7...23..67..123.567.012.456.
66 orrne r7, r7, #0x80 66 orr r5, r5, r5, lsr #9 @ r5 = 3...7...23..67..123.567.01234567
67 tst r3, #0x8000 67
68 orrne r7, r7, #0x40 68 ldmia r0!, {r6-r7}
69 tst r3, #0x800000
70 orrne r7, r7, #0x20
71 tst r3, #0x80000000
72 orrne r7, r7, #0x10
73 bic r3, r3, r12 69 bic r3, r3, r12
74 add r3, r3, r5 70 add r3, r3, r6
75
76 /* set bits 3..0 */
77 tst r4, #0x80
78 orrne r7, r7, #0x08
79 tst r4, #0x8000
80 orrne r7, r7, #0x04
81 tst r4, #0x800000
82 orrne r7, r7, #0x02
83 tst r4, #0x80000000
84 orrne r7, r7, #0x01
85 bic r4, r4, r12 71 bic r4, r4, r12
86 add r4, r4, r6 72 add r4, r4, r7
87
88 stmia r1!, {r3-r4} 73 stmia r1!, {r3-r4}
89 74
90 strb r7, [lr, #0x10] @ DBOP_DOUT 75 strb r5, [lr, #0x10] @ DBOP_DOUT
91 76
921: 771:
93 ldr r5, [lr, #0xC] @ DBOP_STAT 78 ldr r6, [lr, #0xC] @ DBOP_STAT
94 ands r5, r5, #(1<<6) @ wait until push fifo is full 79 ands r6, r6, #(1<<6) @ wait until push fifo is full
95 bne 1b 80 bne 1b
96 81
97 subs r2, r2, #1 82 subs r2, r2, #1