diff options
Diffstat (limited to 'firmware/target/arm/as3525/sansa-clipplus/lcd-as-clip-plus.S')
-rw-r--r-- | firmware/target/arm/as3525/sansa-clipplus/lcd-as-clip-plus.S | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/firmware/target/arm/as3525/sansa-clipplus/lcd-as-clip-plus.S b/firmware/target/arm/as3525/sansa-clipplus/lcd-as-clip-plus.S new file mode 100644 index 0000000000..4ffbb9252c --- /dev/null +++ b/firmware/target/arm/as3525/sansa-clipplus/lcd-as-clip-plus.S | |||
@@ -0,0 +1,101 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2008 by Jens Arnold | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | |||
22 | #include "as3525.h" | ||
23 | |||
24 | .text | ||
25 | .align 2 | ||
26 | |||
27 | .global lcd_grey_data | ||
28 | .type lcd_grey_data,%function | ||
29 | |||
30 | /* A high performance function to write grey phase data to the display, | ||
31 | * one or multiple pixels. | ||
32 | * | ||
33 | * Arguments: | ||
34 | * r0 - pixel value data address | ||
35 | * r1 - pixel phase data address | ||
36 | * r2 - pixel block count | ||
37 | * | ||
38 | * Register usage: | ||
39 | * r3/r4 - current block of phases | ||
40 | * r5/r6 - current block of values | ||
41 | * r7 - lcd data accumulator | ||
42 | * r12 - phase signs mask | ||
43 | * lr - lcd bridge address | ||
44 | */ | ||
45 | |||
46 | lcd_grey_data: | ||
47 | stmfd sp!, {r4-r7, lr} | ||
48 | mov r12, #0x80 | ||
49 | orr r12, r12, r12, lsl #8 | ||
50 | orr r12, r12, r12, lsl #16 | ||
51 | |||
52 | ldr lr, =GPIOB_BASE | ||
53 | mov r3, #(1<<2) | ||
54 | str r3, [lr, #(4*(1<<2))] @ set pin D/C# of LCD controller (data) | ||
55 | |||
56 | ldr lr, =SSP_BASE | ||
57 | |||
58 | .greyloop: | ||
59 | ldmia r1, {r3-r4} /* Fetch 8 pixel phases */ | ||
60 | ldmia r0!, {r5-r6} /* Fetch 8 pixel values */ | ||
61 | |||
62 | mov r7, #0 | ||
63 | |||
64 | /* set bits 7..4 */ | ||
65 | tst r3, #0x80 | ||
66 | orrne r7, r7, #0x80 | ||
67 | tst r3, #0x8000 | ||
68 | orrne r7, r7, #0x40 | ||
69 | tst r3, #0x800000 | ||
70 | orrne r7, r7, #0x20 | ||
71 | tst r3, #0x80000000 | ||
72 | orrne r7, r7, #0x10 | ||
73 | bic r3, r3, r12 | ||
74 | add r3, r3, r5 | ||
75 | |||
76 | /* set bits 3..0 */ | ||
77 | tst r4, #0x80 | ||
78 | orrne r7, r7, #0x08 | ||
79 | tst r4, #0x8000 | ||
80 | orrne r7, r7, #0x04 | ||
81 | tst r4, #0x800000 | ||
82 | orrne r7, r7, #0x02 | ||
83 | tst r4, #0x80000000 | ||
84 | orrne r7, r7, #0x01 | ||
85 | bic r4, r4, r12 | ||
86 | add r4, r4, r6 | ||
87 | |||
88 | stmia r1!, {r3-r4} | ||
89 | |||
90 | 1: | ||
91 | ldr r5, [lr, #0xC] @ SSP_SR | ||
92 | ands r5, r5, #(1<<1) @ wait until transmit fifo isn't full | ||
93 | beq 1b | ||
94 | |||
95 | strb r7, [lr, #0x08] @ SSP_DATA | ||
96 | |||
97 | subs r2, r2, #1 | ||
98 | bne .greyloop | ||
99 | |||
100 | ldmfd sp!, {r4-r7, pc} | ||
101 | .size lcd_grey_data,.-lcd_grey_data | ||