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Diffstat (limited to 'firmware/target/arm/as3525/ata_sd_as3525.c')
-rw-r--r--firmware/target/arm/as3525/ata_sd_as3525.c47
1 files changed, 38 insertions, 9 deletions
diff --git a/firmware/target/arm/as3525/ata_sd_as3525.c b/firmware/target/arm/as3525/ata_sd_as3525.c
index ab247c86d9..754b1ec749 100644
--- a/firmware/target/arm/as3525/ata_sd_as3525.c
+++ b/firmware/target/arm/as3525/ata_sd_as3525.c
@@ -79,8 +79,12 @@
79#define MCI_SELECT(i) (*(volatile unsigned long *) (pl180_base[i]+0x44)) 79#define MCI_SELECT(i) (*(volatile unsigned long *) (pl180_base[i]+0x44))
80#define MCI_FIFO_CNT(i) (*(volatile unsigned long *) (pl180_base[i]+0x48)) 80#define MCI_FIFO_CNT(i) (*(volatile unsigned long *) (pl180_base[i]+0x48))
81 81
82#define MCI_ERROR \ 82#define MCI_DATA_ERROR \
83 (MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_RX_OVERRUN | MCI_TX_UNDERRUN) 83 ( MCI_DATA_CRC_FAIL \
84 | MCI_DATA_TIMEOUT \
85 | MCI_TX_UNDERRUN \
86 | MCI_RX_OVERRUN \
87 | MCI_START_BIT_ERR)
84 88
85#define MCI_FIFO(i) ((unsigned long *) (pl180_base[i]+0x80)) 89#define MCI_FIFO(i) ((unsigned long *) (pl180_base[i]+0x80))
86/* volumes */ 90/* volumes */
@@ -181,7 +185,7 @@ void INT_NAND(void)
181{ 185{
182 const int status = MCI_STATUS(INTERNAL_AS3525); 186 const int status = MCI_STATUS(INTERNAL_AS3525);
183 187
184 transfer_error[INTERNAL_AS3525] = status & MCI_ERROR; 188 transfer_error[INTERNAL_AS3525] = status & MCI_DATA_ERROR;
185 189
186 wakeup_signal(&transfer_completion_signal); 190 wakeup_signal(&transfer_completion_signal);
187 MCI_CLEAR(INTERNAL_AS3525) = status; 191 MCI_CLEAR(INTERNAL_AS3525) = status;
@@ -192,7 +196,7 @@ void INT_MCI0(void)
192{ 196{
193 const int status = MCI_STATUS(SD_SLOT_AS3525); 197 const int status = MCI_STATUS(SD_SLOT_AS3525);
194 198
195 transfer_error[SD_SLOT_AS3525] = status & MCI_ERROR; 199 transfer_error[SD_SLOT_AS3525] = status & MCI_DATA_ERROR;
196 200
197 wakeup_signal(&transfer_completion_signal); 201 wakeup_signal(&transfer_completion_signal);
198 MCI_CLEAR(SD_SLOT_AS3525) = status; 202 MCI_CLEAR(SD_SLOT_AS3525) = status;
@@ -275,7 +279,6 @@ static int sd_init_card(const int drive)
275 /* CMD0 Go Idle */ 279 /* CMD0 Go Idle */
276 if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL)) 280 if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL))
277 return -1; 281 return -1;
278
279 mci_delay(); 282 mci_delay();
280 283
281 /* CMD8 Check for v2 sd card. Must be sent before using ACMD41 284 /* CMD8 Check for v2 sd card. Must be sent before using ACMD41
@@ -367,6 +370,32 @@ static int sd_init_card(const int drive)
367 /* CMD7 w/rca: Select card to put it in TRAN state */ 370 /* CMD7 w/rca: Select card to put it in TRAN state */
368 if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL)) 371 if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
369 return -10; 372 return -10;
373 mci_delay();
374
375#ifndef BOOTLOADER
376 /* Switch to to 4 bit widebus mode */
377 if(sd_wait_for_state(drive, SD_TRAN) < 0)
378 return -11;
379 mci_delay();
380 /* CMD55 */
381 if(!send_cmd(drive, SD_APP_CMD, card_info[drive].rca, MCI_ARG, NULL))
382 return -12;
383 mci_delay();
384 /* ACMD6 */
385 if(!send_cmd(drive, SD_SET_BUS_WIDTH, 2, MCI_ARG, NULL))
386 return -13;
387 mci_delay();
388 /* CMD55 */
389 if(!send_cmd(drive, SD_APP_CMD, card_info[drive].rca, MCI_ARG, NULL))
390 return -14;
391 mci_delay();
392 /* ACMD42 */
393 if(!send_cmd(drive, SD_SET_CLR_CARD_DETECT, 0, MCI_ARG, NULL))
394 return -15;
395 mci_delay();
396 /* Now that card is widebus make controller widebus also */
397 MCI_CLOCK(drive) |= MCI_CLOCK_WIDEBUS;
398#endif
370 399
371 /* 400 /*
372 * enable bank switching 401 * enable bank switching
@@ -378,7 +407,7 @@ static int sd_init_card(const int drive)
378 { 407 {
379 const int ret = sd_select_bank(-1); 408 const int ret = sd_select_bank(-1);
380 if(ret < 0) 409 if(ret < 0)
381 return ret - 11; 410 return ret -16;
382 } 411 }
383 412
384 card_info[drive].initialized = 1; 413 card_info[drive].initialized = 1;
@@ -481,7 +510,7 @@ static void init_pl180_controller(const int drive)
481 MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0; 510 MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0;
482 MCI_CLEAR(drive) = 0x7ff; 511 MCI_CLEAR(drive) = 0x7ff;
483 512
484 MCI_MASK0(drive) = MCI_ERROR | MCI_DATA_END; 513 MCI_MASK0(drive) = MCI_DATA_ERROR | MCI_DATA_END;
485 MCI_MASK1(drive) = 0; 514 MCI_MASK1(drive) = 0;
486#ifdef HAVE_MULTIDRIVE 515#ifdef HAVE_MULTIDRIVE
487 VIC_INT_ENABLE = 516 VIC_INT_ENABLE =
@@ -634,7 +663,7 @@ static int sd_select_bank(signed char bank)
634 (1<<3) /* DMA */ | 663 (1<<3) /* DMA */ |
635 (9<<4) /* 2^9 = 512 */ ; 664 (9<<4) /* 2^9 = 512 */ ;
636 665
637 /* Wakeup signal comes from NAND/MCIO isr on MCI_ERROR | MCI_DATA_END */ 666 /* Wakeup signal from NAND/MCIO isr on MCI_DATA_ERROR | MCI_DATA_END */
638 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK); 667 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
639 668
640 /* Wait for FIFO to empty, card may still be in PRG state */ 669 /* Wait for FIFO to empty, card may still be in PRG state */
@@ -764,7 +793,7 @@ static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
764 (1<<3) /* DMA */ | 793 (1<<3) /* DMA */ |
765 (9<<4) /* 2^9 = 512 */ ; 794 (9<<4) /* 2^9 = 512 */ ;
766 795
767 /* Wakeup signal comes from NAND/MCIO isr on MCI_ERROR | MCI_DATA_END */ 796 /* Wakeup signal from NAND/MCIO isr on MCI_DATA_ERROR | MCI_DATA_END */
768 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK); 797 wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
769 798
770 /* Wait for FIFO to empty, card may still be in PRG state for writes */ 799 /* Wait for FIFO to empty, card may still be in PRG state for writes */