diff options
Diffstat (limited to 'firmware/system.c')
-rw-r--r-- | firmware/system.c | 402 |
1 files changed, 1 insertions, 401 deletions
diff --git a/firmware/system.c b/firmware/system.c index 02d14e3ee6..7e7effe67d 100644 --- a/firmware/system.c +++ b/firmware/system.c | |||
@@ -171,407 +171,7 @@ bool detect_original_firmware(void) | |||
171 | return !(detect_flashed_ramimage() || detect_flashed_romimage()); | 171 | return !(detect_flashed_ramimage() || detect_flashed_romimage()); |
172 | } | 172 | } |
173 | 173 | ||
174 | #if CONFIG_CPU == SH7034 | 174 | #if defined(CPU_ARM) |
175 | #include "led.h" | ||
176 | #include "system.h" | ||
177 | #include "rolo.h" | ||
178 | |||
179 | static const char* const irqname[] = { | ||
180 | "", "", "", "", "IllInstr", "", "IllSltIn","","", | ||
181 | "CPUAdrEr", "DMAAdrEr", "NMI", "UserBrk", | ||
182 | "","","","","","","","","","","","","","","","","","","", | ||
183 | "Trap32","Trap33","Trap34","Trap35","Trap36","Trap37","Trap38","Trap39", | ||
184 | "Trap40","Trap41","Trap42","Trap43","Trap44","Trap45","Trap46","Trap47", | ||
185 | "Trap48","Trap49","Trap50","Trap51","Trap52","Trap53","Trap54","Trap55", | ||
186 | "Trap56","Trap57","Trap58","Trap59","Trap60","Trap61","Trap62","Trap63", | ||
187 | "Irq0","Irq1","Irq2","Irq3","Irq4","Irq5","Irq6","Irq7", | ||
188 | "Dma0","","Dma1","","Dma2","","Dma3","", | ||
189 | "IMIA0","IMIB0","OVI0","", "IMIA1","IMIB1","OVI1","", | ||
190 | "IMIA2","IMIB2","OVI2","", "IMIA3","IMIB3","OVI3","", | ||
191 | "IMIA4","IMIB4","OVI4","", | ||
192 | "Ser0Err","Ser0Rx","Ser0Tx","Ser0TE", | ||
193 | "Ser1Err","Ser1Rx","Ser1Tx","Ser1TE", | ||
194 | "ParityEr","A/D conv","","","Watchdog","DRAMRefr" | ||
195 | }; | ||
196 | |||
197 | #define RESERVE_INTERRUPT(number) "\t.long\t_UIE" #number "\n" | ||
198 | #define DEFAULT_INTERRUPT(name, number) "\t.weak\t_" #name \ | ||
199 | "\n\t.set\t_" #name ",_UIE" #number \ | ||
200 | "\n\t.long\t_" #name "\n" | ||
201 | |||
202 | asm ( | ||
203 | |||
204 | /* Vector table. | ||
205 | * Handled in asm because gcc 4.x doesn't allow weak aliases to symbols | ||
206 | * defined in an asm block -- silly. | ||
207 | * Reset vectors (0..3) are handled in crt0.S */ | ||
208 | |||
209 | ".section\t.vectors,\"aw\",@progbits\n" | ||
210 | DEFAULT_INTERRUPT (GII, 4) | ||
211 | RESERVE_INTERRUPT ( 5) | ||
212 | DEFAULT_INTERRUPT (ISI, 6) | ||
213 | RESERVE_INTERRUPT ( 7) | ||
214 | RESERVE_INTERRUPT ( 8) | ||
215 | DEFAULT_INTERRUPT (CPUAE, 9) | ||
216 | DEFAULT_INTERRUPT (DMAAE, 10) | ||
217 | DEFAULT_INTERRUPT (NMI, 11) | ||
218 | DEFAULT_INTERRUPT (UB, 12) | ||
219 | RESERVE_INTERRUPT ( 13) | ||
220 | RESERVE_INTERRUPT ( 14) | ||
221 | RESERVE_INTERRUPT ( 15) | ||
222 | RESERVE_INTERRUPT ( 16) /* TCB #0 */ | ||
223 | RESERVE_INTERRUPT ( 17) /* TCB #1 */ | ||
224 | RESERVE_INTERRUPT ( 18) /* TCB #2 */ | ||
225 | RESERVE_INTERRUPT ( 19) /* TCB #3 */ | ||
226 | RESERVE_INTERRUPT ( 20) /* TCB #4 */ | ||
227 | RESERVE_INTERRUPT ( 21) /* TCB #5 */ | ||
228 | RESERVE_INTERRUPT ( 22) /* TCB #6 */ | ||
229 | RESERVE_INTERRUPT ( 23) /* TCB #7 */ | ||
230 | RESERVE_INTERRUPT ( 24) /* TCB #8 */ | ||
231 | RESERVE_INTERRUPT ( 25) /* TCB #9 */ | ||
232 | RESERVE_INTERRUPT ( 26) /* TCB #10 */ | ||
233 | RESERVE_INTERRUPT ( 27) /* TCB #11 */ | ||
234 | RESERVE_INTERRUPT ( 28) /* TCB #12 */ | ||
235 | RESERVE_INTERRUPT ( 29) /* TCB #13 */ | ||
236 | RESERVE_INTERRUPT ( 30) /* TCB #14 */ | ||
237 | RESERVE_INTERRUPT ( 31) /* TCB #15 */ | ||
238 | DEFAULT_INTERRUPT (TRAPA32, 32) | ||
239 | DEFAULT_INTERRUPT (TRAPA33, 33) | ||
240 | DEFAULT_INTERRUPT (TRAPA34, 34) | ||
241 | DEFAULT_INTERRUPT (TRAPA35, 35) | ||
242 | DEFAULT_INTERRUPT (TRAPA36, 36) | ||
243 | DEFAULT_INTERRUPT (TRAPA37, 37) | ||
244 | DEFAULT_INTERRUPT (TRAPA38, 38) | ||
245 | DEFAULT_INTERRUPT (TRAPA39, 39) | ||
246 | DEFAULT_INTERRUPT (TRAPA40, 40) | ||
247 | DEFAULT_INTERRUPT (TRAPA41, 41) | ||
248 | DEFAULT_INTERRUPT (TRAPA42, 42) | ||
249 | DEFAULT_INTERRUPT (TRAPA43, 43) | ||
250 | DEFAULT_INTERRUPT (TRAPA44, 44) | ||
251 | DEFAULT_INTERRUPT (TRAPA45, 45) | ||
252 | DEFAULT_INTERRUPT (TRAPA46, 46) | ||
253 | DEFAULT_INTERRUPT (TRAPA47, 47) | ||
254 | DEFAULT_INTERRUPT (TRAPA48, 48) | ||
255 | DEFAULT_INTERRUPT (TRAPA49, 49) | ||
256 | DEFAULT_INTERRUPT (TRAPA50, 50) | ||
257 | DEFAULT_INTERRUPT (TRAPA51, 51) | ||
258 | DEFAULT_INTERRUPT (TRAPA52, 52) | ||
259 | DEFAULT_INTERRUPT (TRAPA53, 53) | ||
260 | DEFAULT_INTERRUPT (TRAPA54, 54) | ||
261 | DEFAULT_INTERRUPT (TRAPA55, 55) | ||
262 | DEFAULT_INTERRUPT (TRAPA56, 56) | ||
263 | DEFAULT_INTERRUPT (TRAPA57, 57) | ||
264 | DEFAULT_INTERRUPT (TRAPA58, 58) | ||
265 | DEFAULT_INTERRUPT (TRAPA59, 59) | ||
266 | DEFAULT_INTERRUPT (TRAPA60, 60) | ||
267 | DEFAULT_INTERRUPT (TRAPA61, 61) | ||
268 | DEFAULT_INTERRUPT (TRAPA62, 62) | ||
269 | DEFAULT_INTERRUPT (TRAPA63, 63) | ||
270 | DEFAULT_INTERRUPT (IRQ0, 64) | ||
271 | DEFAULT_INTERRUPT (IRQ1, 65) | ||
272 | DEFAULT_INTERRUPT (IRQ2, 66) | ||
273 | DEFAULT_INTERRUPT (IRQ3, 67) | ||
274 | DEFAULT_INTERRUPT (IRQ4, 68) | ||
275 | DEFAULT_INTERRUPT (IRQ5, 69) | ||
276 | DEFAULT_INTERRUPT (IRQ6, 70) | ||
277 | DEFAULT_INTERRUPT (IRQ7, 71) | ||
278 | DEFAULT_INTERRUPT (DEI0, 72) | ||
279 | RESERVE_INTERRUPT ( 73) | ||
280 | DEFAULT_INTERRUPT (DEI1, 74) | ||
281 | RESERVE_INTERRUPT ( 75) | ||
282 | DEFAULT_INTERRUPT (DEI2, 76) | ||
283 | RESERVE_INTERRUPT ( 77) | ||
284 | DEFAULT_INTERRUPT (DEI3, 78) | ||
285 | RESERVE_INTERRUPT ( 79) | ||
286 | DEFAULT_INTERRUPT (IMIA0, 80) | ||
287 | DEFAULT_INTERRUPT (IMIB0, 81) | ||
288 | DEFAULT_INTERRUPT (OVI0, 82) | ||
289 | RESERVE_INTERRUPT ( 83) | ||
290 | DEFAULT_INTERRUPT (IMIA1, 84) | ||
291 | DEFAULT_INTERRUPT (IMIB1, 85) | ||
292 | DEFAULT_INTERRUPT (OVI1, 86) | ||
293 | RESERVE_INTERRUPT ( 87) | ||
294 | DEFAULT_INTERRUPT (IMIA2, 88) | ||
295 | DEFAULT_INTERRUPT (IMIB2, 89) | ||
296 | DEFAULT_INTERRUPT (OVI2, 90) | ||
297 | RESERVE_INTERRUPT ( 91) | ||
298 | DEFAULT_INTERRUPT (IMIA3, 92) | ||
299 | DEFAULT_INTERRUPT (IMIB3, 93) | ||
300 | DEFAULT_INTERRUPT (OVI3, 94) | ||
301 | RESERVE_INTERRUPT ( 95) | ||
302 | DEFAULT_INTERRUPT (IMIA4, 96) | ||
303 | DEFAULT_INTERRUPT (IMIB4, 97) | ||
304 | DEFAULT_INTERRUPT (OVI4, 98) | ||
305 | RESERVE_INTERRUPT ( 99) | ||
306 | DEFAULT_INTERRUPT (REI0, 100) | ||
307 | DEFAULT_INTERRUPT (RXI0, 101) | ||
308 | DEFAULT_INTERRUPT (TXI0, 102) | ||
309 | DEFAULT_INTERRUPT (TEI0, 103) | ||
310 | DEFAULT_INTERRUPT (REI1, 104) | ||
311 | DEFAULT_INTERRUPT (RXI1, 105) | ||
312 | DEFAULT_INTERRUPT (TXI1, 106) | ||
313 | DEFAULT_INTERRUPT (TEI1, 107) | ||
314 | RESERVE_INTERRUPT ( 108) | ||
315 | DEFAULT_INTERRUPT (ADITI, 109) | ||
316 | |||
317 | /* UIE# block. | ||
318 | * Must go into the same section as the UIE() handler */ | ||
319 | |||
320 | "\t.text\n" | ||
321 | "_UIE4:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
322 | "_UIE5:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
323 | "_UIE6:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
324 | "_UIE7:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
325 | "_UIE8:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
326 | "_UIE9:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
327 | "_UIE10:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
328 | "_UIE11:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
329 | "_UIE12:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
330 | "_UIE13:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
331 | "_UIE14:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
332 | "_UIE15:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
333 | "_UIE16:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
334 | "_UIE17:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
335 | "_UIE18:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
336 | "_UIE19:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
337 | "_UIE20:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
338 | "_UIE21:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
339 | "_UIE22:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
340 | "_UIE23:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
341 | "_UIE24:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
342 | "_UIE25:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
343 | "_UIE26:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
344 | "_UIE27:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
345 | "_UIE28:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
346 | "_UIE29:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
347 | "_UIE30:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
348 | "_UIE31:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
349 | "_UIE32:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
350 | "_UIE33:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
351 | "_UIE34:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
352 | "_UIE35:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
353 | "_UIE36:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
354 | "_UIE37:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
355 | "_UIE38:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
356 | "_UIE39:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
357 | "_UIE40:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
358 | "_UIE41:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
359 | "_UIE42:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
360 | "_UIE43:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
361 | "_UIE44:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
362 | "_UIE45:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
363 | "_UIE46:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
364 | "_UIE47:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
365 | "_UIE48:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
366 | "_UIE49:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
367 | "_UIE50:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
368 | "_UIE51:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
369 | "_UIE52:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
370 | "_UIE53:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
371 | "_UIE54:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
372 | "_UIE55:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
373 | "_UIE56:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
374 | "_UIE57:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
375 | "_UIE58:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
376 | "_UIE59:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
377 | "_UIE60:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
378 | "_UIE61:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
379 | "_UIE62:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
380 | "_UIE63:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
381 | "_UIE64:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
382 | "_UIE65:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
383 | "_UIE66:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
384 | "_UIE67:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
385 | "_UIE68:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
386 | "_UIE69:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
387 | "_UIE70:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
388 | "_UIE71:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
389 | "_UIE72:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
390 | "_UIE73:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
391 | "_UIE74:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
392 | "_UIE75:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
393 | "_UIE76:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
394 | "_UIE77:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
395 | "_UIE78:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
396 | "_UIE79:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
397 | "_UIE80:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
398 | "_UIE81:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
399 | "_UIE82:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
400 | "_UIE83:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
401 | "_UIE84:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
402 | "_UIE85:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
403 | "_UIE86:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
404 | "_UIE87:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
405 | "_UIE88:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
406 | "_UIE89:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
407 | "_UIE90:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
408 | "_UIE91:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
409 | "_UIE92:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
410 | "_UIE93:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
411 | "_UIE94:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
412 | "_UIE95:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
413 | "_UIE96:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
414 | "_UIE97:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
415 | "_UIE98:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
416 | "_UIE99:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
417 | "_UIE100:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
418 | "_UIE101:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
419 | "_UIE102:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
420 | "_UIE103:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
421 | "_UIE104:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
422 | "_UIE105:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
423 | "_UIE106:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
424 | "_UIE107:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
425 | "_UIE108:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
426 | "_UIE109:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n" | ||
427 | |||
428 | ); | ||
429 | |||
430 | extern void UIE4(void); /* needed for calculating the UIE number */ | ||
431 | |||
432 | void UIE (unsigned int pc) __attribute__((section(".text"))); | ||
433 | void UIE (unsigned int pc) /* Unexpected Interrupt or Exception */ | ||
434 | { | ||
435 | #if CONFIG_LED == LED_REAL | ||
436 | bool state = false; | ||
437 | int i = 0; | ||
438 | #endif | ||
439 | unsigned int n; | ||
440 | char str[32]; | ||
441 | |||
442 | asm volatile ("sts\tpr,%0" : "=r"(n)); | ||
443 | |||
444 | /* clear screen */ | ||
445 | lcd_clear_display (); | ||
446 | #ifdef HAVE_LCD_BITMAP | ||
447 | lcd_setfont(FONT_SYSFIXED); | ||
448 | #endif | ||
449 | /* output exception */ | ||
450 | n = (n - (unsigned)UIE4 + 12)>>2; /* get exception or interrupt number */ | ||
451 | snprintf(str,sizeof(str),"I%02x:%s",n,irqname[n]); | ||
452 | lcd_puts(0,0,str); | ||
453 | snprintf(str,sizeof(str),"at %08x",pc); | ||
454 | lcd_puts(0,1,str); | ||
455 | lcd_update (); | ||
456 | |||
457 | while (1) | ||
458 | { | ||
459 | #if CONFIG_LED == LED_REAL | ||
460 | if (--i <= 0) | ||
461 | { | ||
462 | state = !state; | ||
463 | led(state); | ||
464 | i = 240000; | ||
465 | } | ||
466 | #endif | ||
467 | |||
468 | /* try to restart firmware if ON is pressed */ | ||
469 | #if CONFIG_KEYPAD == PLAYER_PAD | ||
470 | if (!(PADRL & 0x20)) | ||
471 | #elif CONFIG_KEYPAD == RECORDER_PAD | ||
472 | #ifdef HAVE_FMADC | ||
473 | if (!(PCDR & 0x0008)) | ||
474 | #else | ||
475 | if (!(PBDRH & 0x01)) | ||
476 | #endif | ||
477 | #elif CONFIG_KEYPAD == ONDIO_PAD | ||
478 | if (!(PCDR & 0x0008)) | ||
479 | #endif | ||
480 | { | ||
481 | /* enable the watchguard timer, but don't service it */ | ||
482 | RSTCSR_W = 0x5a40; /* Reset enabled, power-on reset */ | ||
483 | TCSR_W = 0xa560; /* Watchdog timer mode, timer enabled, sysclk/2 */ | ||
484 | } | ||
485 | } | ||
486 | } | ||
487 | |||
488 | void system_init(void) | ||
489 | { | ||
490 | /* Disable all interrupts */ | ||
491 | IPRA = 0; | ||
492 | IPRB = 0; | ||
493 | IPRC = 0; | ||
494 | IPRD = 0; | ||
495 | IPRE = 0; | ||
496 | |||
497 | /* NMI level low, falling edge on all interrupts */ | ||
498 | ICR = 0; | ||
499 | |||
500 | /* Enable burst and RAS down mode on DRAM */ | ||
501 | DCR |= 0x5000; | ||
502 | |||
503 | /* Activate Warp mode (simultaneous internal and external mem access) */ | ||
504 | BCR |= 0x2000; | ||
505 | |||
506 | /* Bus state controller initializations. These are only necessary when | ||
507 | running from flash. */ | ||
508 | WCR1 = 0x40FD; /* Long wait states for CS6 (ATA), short for the rest. */ | ||
509 | WCR3 = 0x8000; /* WAIT is pulled up, 1 state inserted for CS6 */ | ||
510 | } | ||
511 | |||
512 | void system_reboot (void) | ||
513 | { | ||
514 | set_irq_level(HIGHEST_IRQ_LEVEL); | ||
515 | |||
516 | asm volatile ("ldc\t%0,vbr" : : "r"(0)); | ||
517 | |||
518 | PACR2 |= 0x4000; /* for coldstart detection */ | ||
519 | IPRA = 0; | ||
520 | IPRB = 0; | ||
521 | IPRC = 0; | ||
522 | IPRD = 0; | ||
523 | IPRE = 0; | ||
524 | ICR = 0; | ||
525 | |||
526 | asm volatile ("jmp @%0; mov.l @%1,r15" : : | ||
527 | "r"(*(int*)0),"r"(4)); | ||
528 | } | ||
529 | |||
530 | /* Utilise the user break controller to catch invalid memory accesses. */ | ||
531 | int system_memory_guard(int newmode) | ||
532 | { | ||
533 | static const struct { | ||
534 | unsigned long addr; | ||
535 | unsigned long mask; | ||
536 | unsigned short bbr; | ||
537 | } modes[MAXMEMGUARD] = { | ||
538 | /* catch nothing */ | ||
539 | { 0x00000000, 0x00000000, 0x0000 }, | ||
540 | /* catch writes to area 02 (flash ROM) */ | ||
541 | { 0x02000000, 0x00FFFFFF, 0x00F8 }, | ||
542 | /* catch all accesses to areas 00 (internal ROM) and 01 (free) */ | ||
543 | { 0x00000000, 0x01FFFFFF, 0x00FC } | ||
544 | }; | ||
545 | |||
546 | int oldmode = MEMGUARD_NONE; | ||
547 | int i; | ||
548 | |||
549 | /* figure out the old mode from what is in the UBC regs. If the register | ||
550 | values don't match any mode, assume MEMGUARD_NONE */ | ||
551 | for (i = MEMGUARD_NONE; i < MAXMEMGUARD; i++) | ||
552 | { | ||
553 | if (BAR == modes[i].addr && BAMR == modes[i].mask && | ||
554 | BBR == modes[i].bbr) | ||
555 | { | ||
556 | oldmode = i; | ||
557 | break; | ||
558 | } | ||
559 | } | ||
560 | |||
561 | if (newmode == MEMGUARD_KEEP) | ||
562 | newmode = oldmode; | ||
563 | |||
564 | BBR = 0; /* switch off everything first */ | ||
565 | |||
566 | /* always set the UBC according to the mode, in case the old settings | ||
567 | didn't match any valid mode */ | ||
568 | BAR = modes[newmode].addr; | ||
569 | BAMR = modes[newmode].mask; | ||
570 | BBR = modes[newmode].bbr; | ||
571 | |||
572 | return oldmode; | ||
573 | } | ||
574 | #elif defined(CPU_ARM) | ||
575 | 175 | ||
576 | static const char* const uiename[] = { | 176 | static const char* const uiename[] = { |
577 | "Undefined instruction", "Prefetch abort", "Data abort" | 177 | "Undefined instruction", "Prefetch abort", "Data abort" |