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-rw-r--r--firmware/export/aic3x.h77
-rw-r--r--firmware/export/audiohw.h2
-rw-r--r--firmware/export/config.h6
-rw-r--r--firmware/export/config/sansaconnect.h201
-rw-r--r--firmware/export/dm320.h51
5 files changed, 337 insertions, 0 deletions
diff --git a/firmware/export/aic3x.h b/firmware/export/aic3x.h
new file mode 100644
index 0000000000..17e5ea019a
--- /dev/null
+++ b/firmware/export/aic3x.h
@@ -0,0 +1,77 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: $
9 *
10 * Copyright (C) 2011 by Tomasz Moń
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef _AIC3X_H_
23#define _AIC3X_H_
24
25#define VOLUME_MIN -630
26#define VOLUME_MAX 0
27
28extern int tenthdb2master(int db);
29
30/*** definitions ***/
31extern void audiohw_set_headphone_vol(int vol_l, int vol_r);
32
33/* Page 0 registers */
34#define AIC3X_PAGE_SELECT 0
35#define AIC3X_SOFT_RESET 1
36#define AIC3X_SMPL_RATE 2
37#define AIC3X_PLL_REG_A 3
38#define AIC3X_PLL_REG_B 4
39#define AIC3X_PLL_REG_C 5
40#define AIC3X_PLL_REG_D 6
41#define AIC3X_DATAPATH 7
42#define AIC3X_DATA_REG_A 8
43#define AIC3X_DATA_REG_B 9
44#define AIC3X_DATA_REG_C 10
45
46#define AIC3X_DAC_POWER 37
47#define AIC3X_HIGH_POWER 38
48
49#define AIC3X_POP_REDUCT 42
50#define AIC3X_LEFT_VOL 43
51#define AIC3X_RIGHT_VOL 44
52
53#define AIC3X_DAC_L1_VOL 47
54#define AIC3X_HPLOUT_LVL 51
55
56#define AIC3X_HPLCOM_LVL 58
57
58#define AIC3X_DAC_R1_VOL 64
59#define AIC3X_HPROUT_LVL 65
60
61#define AIC3X_DAC_L1_MONO_LOP_M_VOL 75
62
63#define AIC3X_DAC_R1_MONO_LOP_M_VOL 76
64
65#define AIC3X_MONO_LOP_M_LVL 79
66
67#define AIC3X_DAC_L1_LEFT_LOP_M_VOL 82
68
69#define AIC3X_LEFT_LOP_M_LVL 86
70
71#define AIC3X_DAC_R1_RIGHT_LOP_M_VOL 92
72#define AIC3X_RIGHT_LOP_M_LVL 93
73#define AIC3X_MOD_POWER 94
74
75#define AIC3X_GPIO1_CTRL 98
76
77#endif /*_AIC3X_H_*/
diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h
index 6bf4d71810..102d107d8a 100644
--- a/firmware/export/audiohw.h
+++ b/firmware/export/audiohw.h
@@ -70,6 +70,8 @@
70#include "ak4537.h" 70#include "ak4537.h"
71#elif defined(HAVE_RK27XX_CODEC) 71#elif defined(HAVE_RK27XX_CODEC)
72#include "rk27xx_codec.h" 72#include "rk27xx_codec.h"
73#elif defined(HAVE_AIC3X)
74#include "aic3x.h"
73#elif defined(HAVE_CS42L55) 75#elif defined(HAVE_CS42L55)
74#include "cs42l55.h" 76#include "cs42l55.h"
75#elif defined(HAVE_IMX233_CODEC) 77#elif defined(HAVE_IMX233_CODEC)
diff --git a/firmware/export/config.h b/firmware/export/config.h
index 55a194817d..2e7b4dc4d6 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -142,6 +142,7 @@
142#define RK27XX_GENERIC_PAD 49 142#define RK27XX_GENERIC_PAD 49
143#define HM60X_PAD 50 143#define HM60X_PAD 50
144#define HM801_PAD 51 144#define HM801_PAD 51
145#define SANSA_CONNECT_PAD 52
145 146
146/* CONFIG_REMOTE_KEYPAD */ 147/* CONFIG_REMOTE_KEYPAD */
147#define H100_REMOTE 1 148#define H100_REMOTE 1
@@ -229,6 +230,7 @@
229#define LCD_SPFD5420A 42 /* rk27xx */ 230#define LCD_SPFD5420A 42 /* rk27xx */
230#define LCD_CLIPZIP 43 /* as used by the Sandisk Sansa Clip Zip */ 231#define LCD_CLIPZIP 43 /* as used by the Sandisk Sansa Clip Zip */
231#define LCD_HX8340B 44 /* as used by the HiFiMAN HM-601/HM-602/HM-801 */ 232#define LCD_HX8340B 44 /* as used by the HiFiMAN HM-601/HM-602/HM-801 */
233#define LCD_CONNECT 45 /* as used by the Sandisk Sansa Connect */
232 234
233/* LCD_PIXELFORMAT */ 235/* LCD_PIXELFORMAT */
234#define HORIZONTAL_PACKING 1 236#define HORIZONTAL_PACKING 1
@@ -302,6 +304,7 @@ Lyre prototype 1 */
302#define RTC_D2 18 /* Either PCF50606 or PCF50635 */ 304#define RTC_D2 18 /* Either PCF50606 or PCF50635 */
303#define RTC_S35380A 19 305#define RTC_S35380A 19
304#define RTC_IMX233 20 306#define RTC_IMX233 20
307#define RTC_STM41T62 21 /* ST M41T62 */
305 308
306/* USB On-the-go */ 309/* USB On-the-go */
307#define USBOTG_M66591 6591 /* M:Robe 500 */ 310#define USBOTG_M66591 6591 /* M:Robe 500 */
@@ -314,6 +317,7 @@ Lyre prototype 1 */
314#define USBOTG_AS3525v2 3535 /* AMS AS3525v2 FIXME : same as S3C6400X */ 317#define USBOTG_AS3525v2 3535 /* AMS AS3525v2 FIXME : same as S3C6400X */
315#define USBOTG_S3C6400X 6400 /* Samsung S3C6400X, also used in the S5L8701/S5L8702/S5L8720 */ 318#define USBOTG_S3C6400X 6400 /* Samsung S3C6400X, also used in the S5L8701/S5L8702/S5L8720 */
316#define USBOTG_RK27XX 2700 /* Rockchip rk27xx */ 319#define USBOTG_RK27XX 2700 /* Rockchip rk27xx */
320#define USBOTG_TNETV105 105 /* TI TNETV105 */
317 321
318/* Multiple cores */ 322/* Multiple cores */
319#define CPU 0 323#define CPU 0
@@ -466,6 +470,8 @@ Lyre prototype 1 */
466#include "config/hifimanhm60x.h" 470#include "config/hifimanhm60x.h"
467#elif defined(HM801) 471#elif defined(HM801)
468#include "config/hifimanhm801.h" 472#include "config/hifimanhm801.h"
473#elif defined(SANSA_CONNECT)
474#include "config/sansaconnect.h"
469#elif defined(SDLAPP) 475#elif defined(SDLAPP)
470#include "config/sdlapp.h" 476#include "config/sdlapp.h"
471#elif defined(ANDROID) 477#elif defined(ANDROID)
diff --git a/firmware/export/config/sansaconnect.h b/firmware/export/config/sansaconnect.h
new file mode 100644
index 0000000000..714534d6ad
--- /dev/null
+++ b/firmware/export/config/sansaconnect.h
@@ -0,0 +1,201 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 *
9 * Copyright (C) 2011 by Tomasz Moń
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
17 * KIND, either express or implied.
18 *
19 ****************************************************************************/
20
21/*
22 * This config file is for the Sansa Connect
23 */
24#define TARGET_TREE /* this target is using the target tree system */
25
26/* This is the absolute address on the bus set by OF bootloader */
27#define CONFIG_SDRAM_START 0x01000000
28
29#define SANSA_CONNECT 1
30#define MODEL_NAME "Sandisk Sansa Connect"
31
32/* For Rolo and boot loader */
33#define MODEL_NUMBER 81
34
35/* define this if you have a flash memory storage */
36#define HAVE_FLASH_STORAGE
37
38/* define this if you use an SD controller */
39#define CONFIG_STORAGE STORAGE_SD
40
41#define HAVE_MULTIDRIVE
42#define NUM_DRIVES 2
43#define HAVE_HOTSWAP
44#define HAVE_HOTSWAP_STORAGE_AS_MAIN
45
46/* define this if you have a bitmap LCD display */
47#define HAVE_LCD_BITMAP
48
49/* define this if you have a colour LCD */
50#define HAVE_LCD_COLOR
51
52/* define this if you want album art for this target */
53#define HAVE_ALBUMART
54
55/* define this to enable bitmap scaling */
56#define HAVE_BMP_SCALING
57
58/* define this to enable JPEG decoding */
59#define HAVE_JPEG
60
61/* define this if you have access to the quickscreen */
62#define HAVE_QUICKSCREEN
63
64/* define this if you have access to the pitchscreen */
65#define HAVE_PITCHSCREEN
66
67/* define this if you would like tagcache to build on this target */
68#define HAVE_TAGCACHE
69
70/* define this if the target has volume keys which can be used in the lists */
71#define HAVE_VOLUME_IN_LIST
72
73/* define this if you want viewport clipping enabled for safe LCD functions */
74#define HAVE_VIEWPORT_CLIP
75
76/* LCD dimensions */
77#define CONFIG_LCD LCD_CONNECT
78
79#define LCD_WIDTH 240
80#define LCD_HEIGHT 320
81
82#define LCD_DEPTH 16 /* 65k colours */
83#define LCD_PIXELFORMAT RGB565 /* rgb565 */
84
85#define HAVE_LCD_ENABLE
86#ifndef BOOTLOADER
87#define HAVE_LCD_SLEEP
88#endif
89
90#define LCD_SLEEP_TIMEOUT (2*HZ)
91
92#define MAX_ICON_HEIGHT 35
93#define MAX_ICON_WIDTH 35
94
95
96#define CONFIG_KEYPAD SANSA_CONNECT_PAD
97
98/* Define this to have CPU bootsted while scrolling in the UI */
99#define HAVE_GUI_BOOST
100
101/* define this if the target has volume keys which can be used in the lists */
102#define HAVE_VOLUME_IN_LIST
103
104#define HAVE_MORSE_INPUT
105
106/* Define this if you do software codec */
107#define CONFIG_CODEC SWCODEC
108
109//#define HAVE_HARDWARE_BEEP
110
111/* There is no hardware tone control */
112#define HAVE_SW_TONE_CONTROLS
113
114#define HAVE_AIC3X
115
116//#define HW_SAMPR_CAPS SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 | SAMPR_CAP_8
117
118/* define this if you have a real-time clock */
119//#define CONFIG_RTC RTC_STM41T62
120
121/* define this if the unit uses a scrollwheel for navigation */
122#define HAVE_SCROLLWHEEL
123
124/* Define this for LCD backlight available */
125#define HAVE_BACKLIGHT
126
127#define HAVE_BACKLIGHT_BRIGHTNESS
128
129#define CONFIG_BACKLIGHT_FADING BACKLIGHT_FADING_SW_SETTING
130
131/* Main LCD backlight brightness range and defaults */
132#define MIN_BRIGHTNESS_SETTING 1
133#define MAX_BRIGHTNESS_SETTING 20
134#define DEFAULT_BRIGHTNESS_SETTING 16 /* OF default brightness (80%) */
135#define DEFAULT_DIMNESS_SETTING 6 /* OF default inactive (30%) */
136
137/* Define this if you have a software controlled poweroff */
138#define HAVE_SW_POWEROFF
139
140/* The number of bytes reserved for loadable codecs */
141#define CODEC_SIZE 0x100000
142
143/* The number of bytes reserved for loadable plugins */
144#define PLUGIN_BUFFER_SIZE 0x200000
145
146#define BATTERY_CAPACITY_DEFAULT 800 /* default battery capacity */
147#define BATTERY_CAPACITY_MIN 700 /* min. capacity selectable */
148#define BATTERY_CAPACITY_MAX 1000 /* max. capacity selectable */
149#define BATTERY_CAPACITY_INC 100 /* capacity increment */
150#define BATTERY_TYPES_COUNT 1 /* only one type */
151
152/* define current usage levels */
153#if 0
154/* TODO */
155#define CURRENT_NORMAL 85
156#define CURRENT_BACKLIGHT 200
157#endif
158
159/* Hardware controlled charging with monitoring */
160//#define CONFIG_CHARGING CHARGING_MONITOR
161
162#define CONFIG_CPU DM320
163
164#define CONFIG_I2C I2C_DM320
165#define HAVE_SOFTWARE_I2C
166
167/* define this if the hardware can be powered off while charging */
168#define HAVE_POWEROFF_WHILE_CHARGING
169
170/* The size of the flash ROM */
171#define FLASH_SIZE 0x400000
172
173/* Define this to the CPU frequency */
174#define CPU_FREQ 150000000
175
176/* Define this if you have ATA power-off control */
177#define HAVE_ATA_POWER_OFF
178
179/* Offset ( in the firmware file's header ) to the file CRC */
180#define FIRMWARE_OFFSET_FILE_CRC 0
181
182/* Offset ( in the firmware file's header ) to the real data */
183#define FIRMWARE_OFFSET_FILE_DATA 8
184
185#if 0
186#define HAVE_USBSTACK
187#define USB_VENDOR_ID 0x0781
188#define USB_PRODUCT_ID 0x7480
189#endif
190
191#define INCLUDE_TIMEOUT_API
192
193/* Define this if you have adjustable CPU frequency */
194#define HAVE_ADJUSTABLE_CPU_FREQ
195
196#define BOOTFILE_EXT "sansa"
197#define BOOTFILE "rockbox." BOOTFILE_EXT
198#define BOOTDIR "/.rockbox"
199
200/* Define this if a programmable hotkey is mapped */
201#define HAVE_HOTKEY
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h
index a629586be8..def8508b0b 100644
--- a/firmware/export/dm320.h
+++ b/firmware/export/dm320.h
@@ -870,6 +870,8 @@ extern unsigned long _ttbstart;
870#define CLK_MOD2_TMR0 (1 << 1) 870#define CLK_MOD2_TMR0 (1 << 1)
871#define CLK_MOD2_WDT (1 << 0) 871#define CLK_MOD2_WDT (1 << 0)
872 872
873#define CLK_SEL0_UART0 (1 << 5)
874
873#define CLK_SEL1_OSD (1 << 12) 875#define CLK_SEL1_OSD (1 << 12)
874#define CLK_SEL1_CCD (1 << 8) 876#define CLK_SEL1_CCD (1 << 8)
875#define CLK_SEL1_VENCPLL (1 << 4) 877#define CLK_SEL1_VENCPLL (1 << 4)
@@ -884,6 +886,55 @@ extern unsigned long _ttbstart;
884#define CLK_BYP_DSP (1 << 4) 886#define CLK_BYP_DSP (1 << 4)
885#define CLK_BYP_ARM (1 << 0) 887#define CLK_BYP_ARM (1 << 0)
886 888
889#define CLK_INV_MMC (1 << 0)
890#define CLK_INV_VENC (1 << 4)
891#define CLK_INV_CCD (1 << 8)
892#define CLK_INV_SIF0 (1 << 12)
893#define CLK_INV_SIF1 (1 << 13)
894
895#define MMC_CTRL_DATRST (1 << 0)
896#define MMC_CTRL_CMDRST (1 << 1)
897#define MMC_CTRL_WIDTH (1 << 2)
898#define MMC_CTRL_DMASZEN (1 << 4)
899#define MMC_CTRL_TEST2 (1 << 8)
900#define MMC_CTRL_PERMDR (1 << 9)
901#define MMC_CTRL_PERMDX (1 << 10)
902
903#define MMC_CMD_CMD_MASK (0x3F)
904#define MMC_CMD_PPLEN (1 << 7)
905#define MMC_CMD_BSYEXP (1 << 8)
906#define MMC_CMD_RSPFMT_SHIFT 9
907#define MMC_CMD_RSPFMT_MASK (3 << MMC_CMD_RSPFMT_SHIFT)
908#define MMC_CMD_WRITE (1 << 11)
909#define MMC_CMD_STREAM (1 << 12)
910#define MMC_CMD_DATA (1 << 13)
911#define MMC_CMD_INITCLK (1 << 14)
912#define MMC_CMD_DCLR (1 << 15)
913
914#define MMC_ST0_DATDNE (1 << 0)
915#define MMC_ST0_BSYDNE (1 << 1)
916#define MMC_ST0_RSPDNE (1 << 2)
917#define MMC_ST0_DATA_TIMEOUT (1 << 3)
918#define MMC_ST0_CMD_TIMEOUT (1 << 4)
919#define MMC_ST0_WR_CRCERR (1 << 5)
920#define MMC_ST0_RD_CRCERR (1 << 6)
921#define MMC_ST0_RESP_CRCERR (1 << 7)
922#define MMC_ST0_DMADNE (1 << 8)
923#define MMC_ST0_DXRDY (1 << 9)
924#define MMC_ST0_DRRDY (1 << 10)
925#define MMC_ST0_DAT3_EDGE (1 << 11)
926
927#define MMC_ST1_BUSY (1 << 0)
928#define MMC_ST1_CLKSTP (1 << 1)
929#define MMC_ST1_DXEMPTY (1 << 2)
930#define MMC_ST1_DXFULL (1 << 3)
931#define MMC_ST1_DAT3ST (1 << 4)
932
933#define MMC_DMAMODE_RD_WORDSWAP (1 << 10)
934#define MMC_DMAMODE_WR_WORDSWAP (1 << 11)
935#define MMC_DMAMODE_WRITE (1 << 12)
936#define MMC_DMAMODE_ENABLE (1 << 13)
937#define MMC_DMAMODE_TIMEOUTIRQ_EN (1 << 14)
887/* 938/*
888 * IO_EINTx bits 939 * IO_EINTx bits
889 */ 940 */