diff options
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/pcf5063x.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/firmware/export/pcf5063x.h b/firmware/export/pcf5063x.h index f5f177ace7..2751b67b57 100644 --- a/firmware/export/pcf5063x.h +++ b/firmware/export/pcf5063x.h | |||
@@ -198,12 +198,12 @@ enum pcf5063X_reg_mbcc2 { | |||
198 | 198 | ||
199 | enum pcf5063X_reg_adcc1 { | 199 | enum pcf5063X_reg_adcc1 { |
200 | PCF5063X_ADCC1_ADCSTART = 0x01, | 200 | PCF5063X_ADCC1_ADCSTART = 0x01, |
201 | PCF5063X_ADCC1_RES_10BIT = 0x02, | 201 | PCF5063X_ADCC1_RES_10BIT = 0x00, |
202 | PCF5063X_ADCC1_RES_8BIT = 0x02, | ||
202 | PCF5063X_ADCC1_AVERAGE_NO = 0x00, | 203 | PCF5063X_ADCC1_AVERAGE_NO = 0x00, |
203 | PCF5063X_ADCC1_AVERAGE_4 = 0x04, | 204 | PCF5063X_ADCC1_AVERAGE_4 = 0x04, |
204 | PCF5063X_ADCC1_AVERAGE_8 = 0x08, | 205 | PCF5063X_ADCC1_AVERAGE_8 = 0x08, |
205 | PCF5063X_ADCC1_AVERAGE_16 = 0x0c, | 206 | PCF5063X_ADCC1_AVERAGE_16 = 0x0c, |
206 | |||
207 | PCF5063X_ADCC1_MUX_BATSNS_RES = 0x00, | 207 | PCF5063X_ADCC1_MUX_BATSNS_RES = 0x00, |
208 | PCF5063X_ADCC1_MUX_BATSNS_SUBTR = 0x10, | 208 | PCF5063X_ADCC1_MUX_BATSNS_SUBTR = 0x10, |
209 | PCF5063X_ADCC1_MUX_ADCIN2_RES = 0x20, | 209 | PCF5063X_ADCC1_MUX_ADCIN2_RES = 0x20, |
@@ -211,6 +211,7 @@ enum pcf5063X_reg_adcc1 { | |||
211 | PCF5063X_ADCC1_MUX_BATTEMP = 0x60, | 211 | PCF5063X_ADCC1_MUX_BATTEMP = 0x60, |
212 | PCF5063X_ADCC1_MUX_ADCIN1 = 0x70, | 212 | PCF5063X_ADCC1_MUX_ADCIN1 = 0x70, |
213 | }; | 213 | }; |
214 | #define PCF5063X_ADCC1_RES_MASK 0x02 | ||
214 | #define PCF5063X_ADCC1_AVERAGE_MASK 0x0c | 215 | #define PCF5063X_ADCC1_AVERAGE_MASK 0x0c |
215 | #define PCF5063X_ADCC1_ADCMUX_MASK 0xf0 | 216 | #define PCF5063X_ADCC1_ADCMUX_MASK 0xf0 |
216 | 217 | ||
@@ -219,9 +220,11 @@ enum pcf5063X_reg_adcc2 { | |||
219 | PCF5063X_ADCC2_RATIO_BATTEMP = 0x01, | 220 | PCF5063X_ADCC2_RATIO_BATTEMP = 0x01, |
220 | PCF5063X_ADCC2_RATIO_ADCIN1 = 0x02, | 221 | PCF5063X_ADCC2_RATIO_ADCIN1 = 0x02, |
221 | PCF5063X_ADCC2_RATIO_BOTH = 0x03, | 222 | PCF5063X_ADCC2_RATIO_BOTH = 0x03, |
223 | PCF5063X_ADCC2_RATIOSETTL_10US = 0x00, | ||
222 | PCF5063X_ADCC2_RATIOSETTL_100US = 0x04, | 224 | PCF5063X_ADCC2_RATIOSETTL_100US = 0x04, |
223 | }; | 225 | }; |
224 | #define PCF5063X_ADCC2_RATIO_MASK 0x03 | 226 | #define PCF5063X_ADCC2_RATIO_MASK 0x03 |
227 | #define PCF5063X_ADCC2_RATIOSETTL_MASK 0x04 | ||
225 | 228 | ||
226 | enum pcf5063X_reg_adcc3 { | 229 | enum pcf5063X_reg_adcc3 { |
227 | PCF5063X_ADCC3_ACCSW_EN = 0x01, | 230 | PCF5063X_ADCC3_ACCSW_EN = 0x01, |
@@ -229,6 +232,7 @@ enum pcf5063X_reg_adcc3 { | |||
229 | PCF5063X_ADCC3_RES_DIV_TWO = 0x10, | 232 | PCF5063X_ADCC3_RES_DIV_TWO = 0x10, |
230 | PCF5063X_ADCC3_RES_DIV_THREE = 0x00, | 233 | PCF5063X_ADCC3_RES_DIV_THREE = 0x00, |
231 | }; | 234 | }; |
235 | #define PCF5063X_ADCC3_RES_DIV_MASK 0x10 | ||
232 | 236 | ||
233 | enum pcf5063X_reg_adcs3 { | 237 | enum pcf5063X_reg_adcs3 { |
234 | PCF5063X_ADCS3_REF_NTCSW = 0x00, | 238 | PCF5063X_ADCS3_REF_NTCSW = 0x00, |