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-rw-r--r--firmware/export/audiohw.h2
-rw-r--r--firmware/export/config.h4
-rw-r--r--firmware/export/config/shanlingq1.h119
-rw-r--r--firmware/export/cw2015.h57
-rw-r--r--firmware/export/es9218.h230
5 files changed, 412 insertions, 0 deletions
diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h
index ceafc6ebf7..5b2815149d 100644
--- a/firmware/export/audiohw.h
+++ b/firmware/export/audiohw.h
@@ -216,6 +216,8 @@ struct sound_settings_info
216#include "cs4398.h" 216#include "cs4398.h"
217#elif defined(HAVE_ES9018) 217#elif defined(HAVE_ES9018)
218#include "es9018.h" 218#include "es9018.h"
219#elif defined(HAVE_ES9218)
220#include "es9218.h"
219#elif (CONFIG_PLATFORM & (PLATFORM_ANDROID | PLATFORM_MAEMO \ 221#elif (CONFIG_PLATFORM & (PLATFORM_ANDROID | PLATFORM_MAEMO \
220 | PLATFORM_PANDORA | PLATFORM_SDL)) 222 | PLATFORM_PANDORA | PLATFORM_SDL))
221#include "hosted_codec.h" 223#include "hosted_codec.h"
diff --git a/firmware/export/config.h b/firmware/export/config.h
index fdf3bf420d..5e7b2be6e4 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -160,6 +160,7 @@
160#define FIIO_M3K_LINUX_PAD 71 160#define FIIO_M3K_LINUX_PAD 71
161#define EROSQ_PAD 72 161#define EROSQ_PAD 72
162#define FIIO_M3K_PAD 73 162#define FIIO_M3K_PAD 73
163#define SHANLING_Q1_PAD 74
163 164
164/* CONFIG_REMOTE_KEYPAD */ 165/* CONFIG_REMOTE_KEYPAD */
165#define H100_REMOTE 1 166#define H100_REMOTE 1
@@ -274,6 +275,7 @@
274#define LCD_IHIFI770C 67 /* as used by IHIFI 770C */ 275#define LCD_IHIFI770C 67 /* as used by IHIFI 770C */
275#define LCD_IHIFI800 68 /* as used by IHIFI 800 */ 276#define LCD_IHIFI800 68 /* as used by IHIFI 800 */
276#define LCD_FIIOM3K 69 /* as used by the FiiO M3K */ 277#define LCD_FIIOM3K 69 /* as used by the FiiO M3K */
278#define LCD_SHANLING_Q1 70 /* as used by the Shanling Q1 */
277 279
278/* LCD_PIXELFORMAT */ 280/* LCD_PIXELFORMAT */
279#define HORIZONTAL_PACKING 1 281#define HORIZONTAL_PACKING 1
@@ -592,6 +594,8 @@ Lyre prototype 1 */
592#include "config/fiiom3k.h" 594#include "config/fiiom3k.h"
593#elif defined(EROS_Q) 595#elif defined(EROS_Q)
594#include "config/aigoerosq.h" 596#include "config/aigoerosq.h"
597#elif defined(SHANLING_Q1)
598#include "config/shanlingq1.h"
595#else 599#else
596//#error "unknown hwardware platform!" 600//#error "unknown hwardware platform!"
597#endif 601#endif
diff --git a/firmware/export/config/shanlingq1.h b/firmware/export/config/shanlingq1.h
new file mode 100644
index 0000000000..88175b9160
--- /dev/null
+++ b/firmware/export/config/shanlingq1.h
@@ -0,0 +1,119 @@
1/* RoLo-related defines */
2#define MODEL_NAME "Shanling Q1"
3#define MODEL_NUMBER 115
4#define BOOTFILE_EXT "q1"
5#define BOOTFILE "rockbox." BOOTFILE_EXT
6#define BOOTDIR "/.rockbox"
7#define FIRMWARE_OFFSET_FILE_CRC 0
8#define FIRMWARE_OFFSET_FILE_DATA 8
9
10/* CPU defines */
11#define CONFIG_CPU X1000
12#define X1000_EXCLK_FREQ 24000000
13#define CPU_FREQ 1008000000
14
15#ifndef SIMULATOR
16#define TIMER_FREQ X1000_EXCLK_FREQ
17#endif
18
19/* Kernel defines */
20#define INCLUDE_TIMEOUT_API
21#define HAVE_SEMAPHORE_OBJECTS
22
23/* Drivers */
24#define HAVE_I2C_ASYNC
25
26/* Buffer for plugins and codecs. */
27#define PLUGIN_BUFFER_SIZE 0x200000 /* 2 MiB */
28#define CODEC_SIZE 0x100000 /* 1 MiB */
29
30/* LCD defines */
31#define CONFIG_LCD LCD_SHANLING_Q1
32#define LCD_WIDTH 360
33#define LCD_HEIGHT 400
34#define LCD_DEPTH 16
35#define LCD_PIXELFORMAT RGB565
36#define LCD_DPI 200
37#define HAVE_LCD_COLOR
38#define HAVE_LCD_BITMAP
39#define HAVE_LCD_ENABLE
40#define LCD_X1000_FASTSLEEP
41#define LCD_X1000_DMA_WAIT_FOR_FRAME
42
43/* Backlight defines */
44#define HAVE_BACKLIGHT
45#define HAVE_BACKLIGHT_BRIGHTNESS
46#define MIN_BRIGHTNESS_SETTING 1
47#define MAX_BRIGHTNESS_SETTING 100
48#define BRIGHTNESS_STEP 5
49#define DEFAULT_BRIGHTNESS_SETTING 70
50#define CONFIG_BACKLIGHT_FADING BACKLIGHT_FADING_SW_SETTING
51
52/* Codec / audio hardware defines */
53#define HW_SAMPR_CAPS SAMPR_CAP_ALL_192
54#define HAVE_ES9218
55#define HAVE_SW_TONE_CONTROLS
56
57/* Button defines */
58#define CONFIG_KEYPAD SHANLING_Q1_PAD
59#define HAVE_TOUCHSCREEN
60#define HAVE_BUTTON_DATA
61#define HAVE_FT6x06
62#define HAVE_HEADPHONE_DETECTION
63
64/* Storage defines */
65#define CONFIG_STORAGE STORAGE_SD
66#define HAVE_HOTSWAP
67#define HAVE_HOTSWAP_STORAGE_AS_MAIN
68#define HAVE_MULTIDRIVE
69#define NUM_DRIVES 1
70#define STORAGE_WANTS_ALIGN
71#define STORAGE_NEEDS_BOUNCE_BUFFER
72
73/* RTC settings */
74#define CONFIG_RTC RTC_X1000
75/* TODO: implement HAVE_RTC_ALARM */
76
77/* Power management */
78#define CONFIG_BATTERY_MEASURE (VOLTAGE_MEASURE)
79#define CONFIG_CHARGING CHARGING_MONITOR
80#define HAVE_SW_POWEROFF
81
82#ifndef SIMULATOR
83/* TODO: get the CW2015 driver working correctly */
84/* #define HAVE_CW2015 */
85#define HAVE_AXP_PMU 192 /* Presumed */
86#define HAVE_POWEROFF_WHILE_CHARGING
87#endif
88
89/* Only one battery type */
90#define BATTERY_CAPACITY_DEFAULT 1100
91#define BATTERY_CAPACITY_MIN 1100
92#define BATTERY_CAPACITY_MAX 1100
93#define BATTERY_CAPACITY_INC 0
94#define BATTERY_TYPES_COUNT 1
95
96/* USB support */
97#ifndef SIMULATOR
98#define CONFIG_USBOTG USBOTG_DESIGNWARE
99#define USB_DW_ARCH_SLAVE
100#define USB_DW_TURNAROUND 5
101#define HAVE_USBSTACK
102#define USB_VENDOR_ID 0x0525 /* Same as the xDuuo X3, for some reason. */
103#define USB_PRODUCT_ID 0xa4a5 /* Nb. DAC mode uses 20b1:301f 'XMOS Ltd' */
104#define USB_DEVBSS_ATTR __attribute__((aligned(32)))
105#define HAVE_USB_POWER
106#define HAVE_USB_CHARGING_ENABLE
107#define HAVE_BOOTLOADER_USB_MODE
108#endif
109
110/* Rockbox capabilities */
111#define HAVE_FAT16SUPPORT
112#define HAVE_ALBUMART
113#define HAVE_BMP_SCALING
114#define HAVE_JPEG
115#define HAVE_TAGCACHE
116#define HAVE_VOLUME_IN_LIST
117#define HAVE_QUICKSCREEN
118#define HAVE_HOTKEY
119#define AB_REPEAT_ENABLE
diff --git a/firmware/export/cw2015.h b/firmware/export/cw2015.h
new file mode 100644
index 0000000000..c810d1b7b5
--- /dev/null
+++ b/firmware/export/cw2015.h
@@ -0,0 +1,57 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2021 Aidan MacDonald
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef __CW2015_H__
23#define __CW2015_H__
24
25#include <stdint.h>
26#include <stdbool.h>
27
28/* Driver for I2C battery fuel gauge IC CW2015. */
29
30#define CW2015_REG_VERSION 0x00
31#define CW2015_REG_VCELL 0x02 /* 14 bits, registers 0x02 - 0x03 */
32#define CW2015_REG_SOC 0x04 /* 16 bits, registers 0x04 - 0x05 */
33#define CW2015_REG_RRT_ALERT 0x06 /* 13 bit RRT + alert flag, 0x06-0x07 */
34#define CW2015_REG_CONFIG 0x08
35#define CW2015_REG_MODE 0x0a
36#define CW2015_REG_BATINFO 0x10 /* cf. mainline Linux CW2015 driver */
37#define CW2015_SIZE_BATINFO 64
38
39extern void cw2015_init(void);
40
41/* Read the battery terminal voltage, converted to millivolts. */
42extern int cw2015_get_vcell(void);
43
44/* Read the SOC, in percent (0-100%). */
45extern int cw2015_get_soc(void);
46
47/* Get the estimated remaining run time, in minutes.
48 * Not a linearly varying quantity, according to the datasheet. */
49extern int cw2015_get_rrt(void);
50
51/* Read the current battery profile */
52extern const uint8_t* cw2015_get_bat_info(void);
53
54/* Debug screen */
55extern bool cw2015_debug_menu(void);
56
57#endif /* __CW2015_H__ */
diff --git a/firmware/export/es9218.h b/firmware/export/es9218.h
new file mode 100644
index 0000000000..1492304c67
--- /dev/null
+++ b/firmware/export/es9218.h
@@ -0,0 +1,230 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2021 Aidan MacDonald
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef __ES9218_H__
23#define __ES9218_H__
24
25#include <stdbool.h>
26#include <stdint.h>
27
28#define AUDIOHW_CAPS (FILTER_ROLL_OFF_CAP|POWER_MODE_CAP)
29#define AUDIOHW_HAVE_ES9218_ROLL_OFF
30
31#define ES9218_DIG_VOLUME_MIN (-1275)
32#define ES9218_DIG_VOLUME_MAX 0
33#define ES9218_DIG_VOLUME_STEP 5
34
35#define ES9218_AMP_VOLUME_MIN (-240)
36#define ES9218_AMP_VOLUME_MAX 0
37#define ES9218_AMP_VOLUME_STEP 10
38
39AUDIOHW_SETTING(VOLUME, "dB", 1, ES9218_DIG_VOLUME_STEP,
40 ES9218_DIG_VOLUME_MIN, ES9218_DIG_VOLUME_MAX, -200)
41AUDIOHW_SETTING(FILTER_ROLL_OFF, "", 0, 1, 0, 7, 0)
42AUDIOHW_SETTING(POWER_MODE, "", 0, 1, 0, 1, 0)
43
44/* Register addresses */
45#define ES9218_REG_SYSTEM 0x00
46#define ES9218_REG_INPUT_SEL 0x01
47#define ES9218_REG_MIX_AUTOMUTE 0x02
48#define ES9218_REG_ANALOG_VOL 0x03
49#define ES9218_REG_AUTOMUTE_TIME 0x04
50#define ES9218_REG_AUTOMUTE_LEVEL 0x05
51#define ES9218_REG_DOP_VOLUME_RAMP 0x06
52#define ES9218_REG_FILTER_SYS_MUTE 0x07
53#define ES9218_REG_GPIO1_2_CONFIG 0x08
54#define ES9218_REG_RESERVED_1 0x09
55#define ES9218_REG_MASTER_MODE_CONFIG 0x0a
56#define ES9218_REG_OVERCURRENT_PROT 0x0b
57#define ES9218_REG_ASRC_DPLL_BANDWIDTH 0x0c
58#define ES9218_REG_THD_COMP_BYPASS 0x0d
59#define ES9218_REG_SOFT_START_CONFIG 0x0e
60#define ES9218_REG_VOLUME_LEFT 0x0f
61#define ES9218_REG_VOLUME_RIGHT 0x10
62#define ES9218_REG_MASTER_TRIM_BIT0_7 0x11
63#define ES9218_REG_MASTER_TRIM_BIT8_15 0x12
64#define ES9218_REG_MASTER_TRIM_BIT16_23 0x13
65#define ES9218_REG_MASTER_TRIM_BIT24_31 0x14
66#define ES9218_REG_GPIO_INPUT_SEL 0x15
67#define ES9218_REG_THD_COMP_C2_LO 0x16
68#define ES9218_REG_THD_COMP_C2_HI 0x17
69#define ES9218_REG_THD_COMP_C3_LO 0x18
70#define ES9218_REG_THD_COMP_C3_HI 0x19
71#define ES9218_REG_CHARGE_PUMP_SS_DELAY 0x1a
72#define ES9218_REG_GENERAL_CONFIG 0x1b
73#define ES9218_REG_RESERVED_2 0x1c
74#define ES9218_REG_GPIO_INV_CLOCK_GEAR 0x1d
75#define ES9218_REG_CHARGE_PUMP_CLK_LO 0x1e
76#define ES9218_REG_CHARGE_PUMP_CLK_HI 0x1f
77#define ES9218_REG_AMP_CONFIG 0x20
78#define ES9218_REG_INTERRUPT_MASK 0x21
79#define ES9218_REG_PROG_NCO_BIT0_7 0x22
80#define ES9218_REG_PROG_NCO_BIT8_15 0x23
81#define ES9218_REG_PROG_NCO_BIT16_23 0x24
82#define ES9218_REG_PROG_NCO_BIT24_31 0x25
83#define ES9218_REG_RESERVED_3 0x27
84#define ES9218_REG_FIR_RAM_ADDR 0x28
85#define ES9218_REG_FIR_DATA_BIT0_7 0x29
86#define ES9218_REG_FIR_DATA_BIT8_15 0x2a
87#define ES9218_REG_FIR_DATA_BIT16_23 0x2b
88#define ES9218_REG_PROG_FIR_CONFIG 0x2c
89#define ES9218_REG_ANALOG_OVERRIDE_1 0x2d
90#define ES9218_REG_ANALOG_OVERRIDE_2 0x2e
91#define ES9218_REG_ANALOG_OVERRIDE_3 0x2f
92#define ES9218_REG_ANALOG_CTRL 0x30
93#define ES9218_REG_CLKGEAR_CFG_BIT0_7 0x31
94#define ES9218_REG_CLKGEAR_CFG_BIT8_15 0x32
95#define ES9218_REG_CLKGEAR_CFG_BIT16_23 0x33
96#define ES9218_REG_RESERVED_4 0x34
97#define ES9218_REG_THD_COMP_C2_CH2_LO 0x35
98#define ES9218_REG_THD_COMP_C2_CH2_HI 0x36
99#define ES9218_REG_THD_COMP_C3_CH2_LO 0x37
100#define ES9218_REG_THD_COMP_C3_CH2_HI 0x38
101#define ES9218_REG_RESERVED_5 0x39
102#define ES9218_REG_RESERVED_6 0x3a
103#define ES9218_REG_RESERVED_7 0x3b
104#define ES9218_REG_RESERVED_8 0x3c
105#define ES9218_REG_CHIP_ID_AND_STATUS 0x40
106#define ES9218_REG_GPIO_AND_CLOCK_GEAR 0x41
107#define ES9218_REG_DPLL_NUMBER_BIT0_7 0x42
108#define ES9218_REG_DPLL_NUMBER_BIT8_15 0x43
109#define ES9218_REG_DPLL_NUMBER_BIT16_23 0x44
110#define ES9218_REG_DPLL_NUMBER_BIT24_31 0x45
111#define ES9218_REG_INPUT_MUTE_STATUS 0x48
112#define ES9218_REG_FIR_READ_BIT0_7 0x49
113#define ES9218_REG_FIR_READ_BIT8_15 0x4a
114#define ES9218_REG_FIR_READ_BIT16_23 0x4b
115
116enum es9218_clock_gear {
117 ES9218_CLK_GEAR_1 = 0, /* CLK = XI/1 */
118 ES9218_CLK_GEAR_2 = 1, /* CLK = XI/2 */
119 ES9218_CLK_GEAR_4 = 2, /* CLK = XI/4 */
120 ES9218_CLK_GEAR_8 = 3, /* CLK = XI/8 */
121};
122
123enum es9218_amp_mode {
124 ES9218_AMP_MODE_CORE_ON = 0,
125 ES9218_AMP_MODE_LOWFI = 1,
126 ES9218_AMP_MODE_1VRMS = 2,
127 ES9218_AMP_MODE_2VRMS = 3,
128};
129
130enum es9218_iface_role {
131 ES9218_IFACE_ROLE_SLAVE = 0,
132 ES9218_IFACE_ROLE_MASTER = 1,
133};
134
135enum es9218_iface_format {
136 ES9218_IFACE_FORMAT_I2S = 0,
137 ES9218_IFACE_FORMAT_LJUST = 1,
138 ES9218_IFACE_FORMAT_RJUST = 2,
139};
140
141enum es9218_iface_bits {
142 ES9218_IFACE_BITS_16 = 0,
143 ES9218_IFACE_BITS_24 = 1,
144 ES9218_IFACE_BITS_32 = 2,
145};
146
147enum es9218_filter_type {
148 ES9218_FILTER_LINEAR_FAST = 0,
149 ES9218_FILTER_LINEAR_SLOW = 1,
150 ES9218_FILTER_MINIMUM_FAST = 2,
151 ES9218_FILTER_MINIMUM_SLOW = 3,
152 ES9218_FILTER_APODIZING_1 = 4,
153 ES9218_FILTER_APODIZING_2 = 5,
154 ES9218_FILTER_HYBRID_FAST = 6,
155 ES9218_FILTER_BRICK_WALL = 7,
156};
157
158/* Power DAC on or off */
159extern void es9218_open(void);
160extern void es9218_close(void);
161
162/* Clock controls
163 *
164 * - Clock gear divides the input master clock to produce the DAC's clock.
165 * Frequency can be lowered to save power when using lower sample rates.
166 *
167 * - NCO (numerically controller oscillator), according to the datasheet,
168 * defines the ratio between the DAC's clock and the FSR (for PCM modes,
169 * this is I2S frame clock = sample rate). In master mode it effectively
170 * controls the sampling frequency by setting the I2S frame clock output.
171 * It can also be used in slave mode, but other parts of the datasheet
172 * say contradictory things about synchronous operation in slave mode.
173 *
174 * - If using NCO mode and a varying MCLK input (eg. input from the SoC) then
175 * you will need to call es9218_recompute_nco() when changing MCLK in order
176 * to refresh the NCO setting.
177 */
178extern void es9218_set_clock_gear(enum es9218_clock_gear gear);
179extern void es9218_set_nco_frequency(uint32_t fsr);
180extern void es9218_recompute_nco(void);
181
182/* Amplifier controls */
183extern void es9218_set_amp_mode(enum es9218_amp_mode mode);
184extern void es9218_set_amp_powered(bool en);
185
186/* Interface selection */
187extern void es9218_set_iface_role(enum es9218_iface_role role);
188extern void es9218_set_iface_format(enum es9218_iface_format fmt,
189 enum es9218_iface_bits bits);
190
191/* Volume controls, all volumes given in units of dB/10 */
192extern void es9218_set_dig_volume(int vol_l, int vol_r);
193extern void es9218_set_amp_volume(int vol);
194
195/* System mute */
196extern void es9218_mute(bool muted);
197
198/* Oversampling filter */
199extern void es9218_set_filter(enum es9218_filter_type filt);
200
201/* Automute settings */
202extern void es9218_set_automute_time(int time);
203extern void es9218_set_automute_level(int dB);
204extern void es9218_set_automute_fast_mode(bool en);
205
206/* DPLL bandwidth setting (knob = 0-15) */
207extern void es9218_set_dpll_bandwidth(int knob);
208
209/* THD compensation */
210extern void es9218_set_thd_compensation(bool en);
211extern void es9218_set_thd_coeffs(uint16_t c2, uint16_t c3);
212
213/* Direct register read/write/update operations */
214extern int es9218_read(int reg);
215extern void es9218_write(int reg, uint8_t val);
216extern void es9218_update(int reg, uint8_t msk, uint8_t val);
217
218/* GPIO pin setting callbacks */
219extern void es9218_set_power_pin(int level);
220extern void es9218_set_reset_pin(int level);
221
222/* XI(MCLK) getter -- supplied by the target.
223 *
224 * Note: when changing the supplied MCLK frequency, the NCO will need to be
225 * reprogrammed for the new master clock. Call es9218_recompute_nco() to
226 * force this. Not necessary if you're not using NCO mode.
227 */
228extern uint32_t es9218_get_mclk(void);
229
230#endif /* __ES9218_H__ */