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-rw-r--r--firmware/export/audiohw.h4
-rw-r--r--firmware/export/config-cowond2.h140
-rw-r--r--firmware/export/config.h17
-rw-r--r--firmware/export/cpu.h3
-rw-r--r--firmware/export/tcc780x.h156
-rw-r--r--firmware/export/timer.h2
-rw-r--r--firmware/export/wm8985.h43
7 files changed, 361 insertions, 4 deletions
diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h
index 5dc7550478..cdc92221d7 100644
--- a/firmware/export/audiohw.h
+++ b/firmware/export/audiohw.h
@@ -29,6 +29,8 @@
29#include "wm8751.h" 29#include "wm8751.h"
30#elif defined(HAVE_WM8975) || defined(HAVE_WM8978) 30#elif defined(HAVE_WM8975) || defined(HAVE_WM8978)
31#include "wm8975.h" 31#include "wm8975.h"
32#elif defined(HAVE_WM8985)
33#include "wm8985.h"
32#elif defined(HAVE_WM8758) 34#elif defined(HAVE_WM8758)
33#include "wm8758.h" 35#include "wm8758.h"
34#elif defined(HAVE_WM8721) 36#elif defined(HAVE_WM8721)
@@ -62,7 +64,7 @@ enum {
62#endif 64#endif
63#if CONFIG_CODEC == MAS3587F || defined(HAVE_UDA1380) || defined(HAVE_TLV320)\ 65#if CONFIG_CODEC == MAS3587F || defined(HAVE_UDA1380) || defined(HAVE_TLV320)\
64 || defined(HAVE_WM8975) || defined(HAVE_WM8758) || defined(HAVE_WM8731) \ 66 || defined(HAVE_WM8975) || defined(HAVE_WM8758) || defined(HAVE_WM8731) \
65 || defined(HAVE_AS3514) || defined(HAVE_WM8978) 67 || defined(HAVE_AS3514) || defined(HAVE_WM8978) || defined(HAVE_WM8985)
66 SOUND_LEFT_GAIN, 68 SOUND_LEFT_GAIN,
67 SOUND_RIGHT_GAIN, 69 SOUND_RIGHT_GAIN,
68 SOUND_MIC_GAIN, 70 SOUND_MIC_GAIN,
diff --git a/firmware/export/config-cowond2.h b/firmware/export/config-cowond2.h
new file mode 100644
index 0000000000..4f2d11e424
--- /dev/null
+++ b/firmware/export/config-cowond2.h
@@ -0,0 +1,140 @@
1/*
2 * This config file is for the Cowon iAudio D2
3 */
4#define TARGET_TREE /* this target is using the target tree system */
5
6/* For Rolo and boot loader */
7#define MODEL_NUMBER 34
8
9/* define this if you have recording possibility */
10//#define HAVE_RECORDING
11
12/* Define bitmask of input sources - recordable bitmask can be defined
13 explicitly if different */
14//#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_SPDIF)
15
16/* define this if you have a bitmap LCD display */
17#define HAVE_LCD_BITMAP
18
19/* define this if you have a colour LCD */
20#define HAVE_LCD_COLOR
21
22/* define this if you can flip your LCD */
23#define HAVE_LCD_FLIP
24
25/* define this if you can invert the colours on your LCD */
26#define HAVE_LCD_INVERT
27
28/* define this if you want album art for this target */
29#define HAVE_ALBUMART
30
31/* define this if you have access to the quickscreen */
32#define HAVE_QUICKSCREEN
33/* define this if you have access to the pitchscreen */
34#define HAVE_PITCHSCREEN
35
36/* define this if you would like tagcache to build on this target */
37#define HAVE_TAGCACHE
38
39/* define this if you have a flash memory storage */
40#define HAVE_FLASH_STORAGE
41
42/* LCD dimensions */
43#define LCD_WIDTH 320
44#define LCD_HEIGHT 240
45#define LCD_DEPTH 16
46#define LCD_PIXELFORMAT 565
47
48/* define this if you have LCD enable function */
49#define HAVE_LCD_ENABLE
50
51/* define this to indicate your device's keypad */
52#define CONFIG_KEYPAD COWOND2_PAD
53
54/* define this if you have a real-time clock */
55//#define CONFIG_RTC RTC_TCC780X
56
57/* define this if you have RTC RAM available for settings */
58//#define HAVE_RTC_RAM
59
60/* Define this if you have a software controlled poweroff */
61#define HAVE_SW_POWEROFF
62
63/* The number of bytes reserved for loadable codecs */
64#define CODEC_SIZE 0x80000
65
66/* The number of bytes reserved for loadable plugins */
67#define PLUGIN_BUFFER_SIZE 0x80000
68
69#define AB_REPEAT_ENABLE 1
70
71/* Define this if you do software codec */
72#define CONFIG_CODEC SWCODEC
73
74/* The D2 uses a WM8985 codec */
75#define HAVE_WM8985
76
77/* There is no hardware tone control */
78/* TODO: probably need to use this */
79//#define HAVE_SW_TONE_CONTROLS
80
81/* Define this for LCD backlight available */
82#define HAVE_BACKLIGHT
83
84/* TODO: Enable LCD brightness control */
85//#define HAVE_BACKLIGHT_BRIGHTNESS
86
87/* Main LCD backlight brightness range and defaults */
88//#define MIN_BRIGHTNESS_SETTING 1
89//#define MAX_BRIGHTNESS_SETTING 10
90//#define DEFAULT_BRIGHTNESS_SETTING 8
91
92#define CONFIG_I2C I2C_TCC780X
93
94#define BATTERY_CAPACITY_DEFAULT 1500 /* default battery capacity */
95#define BATTERY_CAPACITY_MIN 1500 /* min. capacity selectable */
96#define BATTERY_CAPACITY_MAX 3200 /* max. capacity selectable */
97#define BATTERY_CAPACITY_INC 50 /* capacity increment */
98#define BATTERY_TYPES_COUNT 1 /* only one type */
99
100/* define this if the unit should not shut down on low battery. */
101/* TODO: this is temporary until battery monitoring implemented */
102#define NO_LOW_BATTERY_SHUTDOWN
103
104#ifndef SIMULATOR
105
106/* Define this if you have a TCC7801 */
107#define CONFIG_CPU TCC7801
108
109/* Define this if you have ATA power-off control */
110#define HAVE_ATA_POWER_OFF
111
112/* Define this to the CPU frequency */
113#define CPU_FREQ 192000000
114
115/* Define this if you have adjustable CPU frequency */
116#define HAVE_ADJUSTABLE_CPU_FREQ
117
118/* Offset ( in the firmware file's header ) to the file length */
119#define FIRMWARE_OFFSET_FILE_LENGTH 0
120
121/* Offset ( in the firmware file's header ) to the file CRC */
122#define FIRMWARE_OFFSET_FILE_CRC 4
123
124/* Offset ( in the firmware file's header ) to the real data */
125#define FIRMWARE_OFFSET_FILE_DATA 6
126
127/* The start address index for ROM builds */
128/* #define ROM_START 0x11010 for behind original Archos */
129#define ROM_START 0x7010 /* for behind BootBox */
130
131/* Software controlled LED */
132#define CONFIG_LED LED_VIRTUAL
133
134#define CONFIG_LCD LCD_COWOND2
135
136#define BOOTFILE_EXT "iaudio"
137#define BOOTFILE "rockbox." BOOTFILE_EXT
138#define BOOTDIR "/"
139
140#endif /* SIMULATOR */
diff --git a/firmware/export/config.h b/firmware/export/config.h
index a3c2390f84..cf75d67aa5 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -53,6 +53,7 @@
53#define IMX31L 31 53#define IMX31L 31
54#define TCC771L 771 54#define TCC771L 771
55#define TCC773L 773 55#define TCC773L 773
56#define TCC7801 7801
56 57
57/* CONFIG_KEYPAD */ 58/* CONFIG_KEYPAD */
58#define PLAYER_PAD 1 59#define PLAYER_PAD 1
@@ -75,7 +76,8 @@
75#define MROBE500_PAD 18 76#define MROBE500_PAD 18
76#define GIGABEAT_S_PAD 19 77#define GIGABEAT_S_PAD 19
77#define LOGIK_DAX_PAD 20 78#define LOGIK_DAX_PAD 20
78#define IAUDIO67_PAD 21 79#define IAUDIO67_PAD 21
80#define COWOND2_PAD 22
79 81
80/* CONFIG_REMOTE_KEYPAD */ 82/* CONFIG_REMOTE_KEYPAD */
81#define H100_REMOTE 1 83#define H100_REMOTE 1
@@ -111,6 +113,7 @@
111#define LCD_MROBE100 19 /* as used by Olympus M:Robe 100 */ 113#define LCD_MROBE100 19 /* as used by Olympus M:Robe 100 */
112#define LCD_LOGIKDAX 20 /* as used by Logik DAX - SSD1815 */ 114#define LCD_LOGIKDAX 20 /* as used by Logik DAX - SSD1815 */
113#define LCD_IAUDIO67 21 /* as used by iAudio 6/7 - unknown */ 115#define LCD_IAUDIO67 21 /* as used by iAudio 6/7 - unknown */
116#define LCD_COWOND2 21 /* as used by Cowon D2 - LTV250QV, TCC7801 driver */
114 117
115/* LCD_PIXELFORMAT */ 118/* LCD_PIXELFORMAT */
116#define HORIZONTAL_PACKING 1 119#define HORIZONTAL_PACKING 1
@@ -136,6 +139,7 @@
136#define I2C_PP5024 8 /* PP5024 style */ 139#define I2C_PP5024 8 /* PP5024 style */
137#define I2C_IMX31L 9 140#define I2C_IMX31L 9
138#define I2C_TCC77X 10 141#define I2C_TCC77X 10
142#define I2C_TCC780X 11
139 143
140/* CONFIG_LED */ 144/* CONFIG_LED */
141#define LED_REAL 1 /* SW controlled LED (Archos recorders, player) */ 145#define LED_REAL 1 /* SW controlled LED (Archos recorders, player) */
@@ -156,6 +160,7 @@
156#define RTC_IMX31L 8 160#define RTC_IMX31L 8
157#define RTC_RX5X348AB 9 161#define RTC_RX5X348AB 9
158#define RTC_TCC77X 10 162#define RTC_TCC77X 10
163#define RTC_TCC780X 11
159 164
160/* USB On-the-go */ 165/* USB On-the-go */
161#define USBOTG_ISP1362 1362 /* iriver H300 */ 166#define USBOTG_ISP1362 1362 /* iriver H300 */
@@ -231,6 +236,8 @@
231#include "config-logikdax.h" 236#include "config-logikdax.h"
232#elif defined(IAUDIO_7) 237#elif defined(IAUDIO_7)
233#include "config-iaudio7.h" 238#include "config-iaudio7.h"
239#elif defined(COWON_D2)
240#include "config-cowond2.h"
234#else 241#else
235/* no known platform */ 242/* no known platform */
236#endif 243#endif
@@ -345,6 +352,11 @@
345#define CPU_TCC77X 352#define CPU_TCC77X
346#endif 353#endif
347 354
355/* define for all cpus from TCC780 family */
356#if (CONFIG_CPU == TCC7801)
357#define CPU_TCC780X
358#endif
359
348/* define for all cpus from ARM7TDMI family (for specific optimisations) */ 360/* define for all cpus from ARM7TDMI family (for specific optimisations) */
349#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25) 361#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25)
350#define CPU_ARM7TDMI 362#define CPU_ARM7TDMI
@@ -353,7 +365,7 @@
353/* define for all cpus from ARM family */ 365/* define for all cpus from ARM family */
354#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \ 366#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \
355 || (CONFIG_CPU == DSC25) || (CONFIG_CPU == IMX31L) || (CONFIG_CPU == DM320) \ 367 || (CONFIG_CPU == DSC25) || (CONFIG_CPU == IMX31L) || (CONFIG_CPU == DM320) \
356 || defined(CPU_TCC77X) 368 || defined(CPU_TCC77X) || defined(CPU_TCC780X)
357#define CPU_ARM 369#define CPU_ARM
358#endif 370#endif
359 371
@@ -380,6 +392,7 @@
380 defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \ 392 defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \
381 defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \ 393 defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \
382 defined(CPU_TCC77X) || /* Telechips: core, plugins, codecs */ \ 394 defined(CPU_TCC77X) || /* Telechips: core, plugins, codecs */ \
395 defined(CPU_TCC780X) || /* Telechips: core, plugins, codecs */ \
383 (CONFIG_CPU == PNX0101)) 396 (CONFIG_CPU == PNX0101))
384#define ICODE_ATTR __attribute__ ((section(".icode"))) 397#define ICODE_ATTR __attribute__ ((section(".icode")))
385#define ICONST_ATTR __attribute__ ((section(".irodata"))) 398#define ICONST_ATTR __attribute__ ((section(".irodata")))
diff --git a/firmware/export/cpu.h b/firmware/export/cpu.h
index 84229378ec..08a91a6d10 100644
--- a/firmware/export/cpu.h
+++ b/firmware/export/cpu.h
@@ -51,3 +51,6 @@
51#ifdef CPU_TCC77X 51#ifdef CPU_TCC77X
52#include "tcc77x.h" 52#include "tcc77x.h"
53#endif 53#endif
54#ifdef CPU_TCC780X
55#include "tcc780x.h"
56#endif
diff --git a/firmware/export/tcc780x.h b/firmware/export/tcc780x.h
new file mode 100644
index 0000000000..df55c6f03d
--- /dev/null
+++ b/firmware/export/tcc780x.h
@@ -0,0 +1,156 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 Rob Purchase
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19#ifndef __TCC780X_H__
20#define __TCC780X_H__
21
22/* General-purpose IO */
23
24#define PORTCFG0 (*(volatile unsigned long *)0xF005A000)
25#define PORTCFG1 (*(volatile unsigned long *)0xF005A004)
26#define PORTCFG2 (*(volatile unsigned long *)0xF005A008)
27#define PORTCFG3 (*(volatile unsigned long *)0xF005A00C)
28
29#define GPIOA (*(volatile unsigned long *)0xF005A020)
30#define GPIOB (*(volatile unsigned long *)0xF005A040)
31#define GPIOC (*(volatile unsigned long *)0xF005A060)
32#define GPIOD (*(volatile unsigned long *)0xF005A080)
33#define GPIOE (*(volatile unsigned long *)0xF005A0A0)
34
35#define GPIOA_DIR (*(volatile unsigned long *)0xF005A024)
36#define GPIOB_DIR (*(volatile unsigned long *)0xF005A044)
37#define GPIOC_DIR (*(volatile unsigned long *)0xF005A064)
38#define GPIOD_DIR (*(volatile unsigned long *)0xF005A084)
39#define GPIOE_DIR (*(volatile unsigned long *)0xF005A0A4)
40
41#define GPIOA_SET (*(volatile unsigned long *)0xF005A028)
42#define GPIOB_SET (*(volatile unsigned long *)0xF005A048)
43#define GPIOC_SET (*(volatile unsigned long *)0xF005A068)
44#define GPIOD_SET (*(volatile unsigned long *)0xF005A088)
45#define GPIOE_SET (*(volatile unsigned long *)0xF005A0A8)
46
47#define GPIOA_CLEAR (*(volatile unsigned long *)0xF005A02C)
48#define GPIOB_CLEAR (*(volatile unsigned long *)0xF005A04C)
49#define GPIOC_CLEAR (*(volatile unsigned long *)0xF005A06C)
50#define GPIOD_CLEAR (*(volatile unsigned long *)0xF005A08C)
51#define GPIOE_CLEAR (*(volatile unsigned long *)0xF005A0AC)
52
53/* Clock Generator */
54
55#define CLKCTRL (*(volatile unsigned long *)0xF3000000)
56#define PLL0CFG (*(volatile unsigned long *)0xF3000004)
57#define PLL1CFG (*(volatile unsigned long *)0xF3000008)
58#define CLKDIVC (*(volatile unsigned long *)0xF300000C)
59#define CLKDIVC1 (*(volatile unsigned long *)0xF3000010)
60#define MODECTR (*(volatile unsigned long *)0xF3000014)
61#define BCLKCTR (*(volatile unsigned long *)0xF3000018)
62#define SWRESET (*(volatile unsigned long *)0xF300001C)
63#define PCLKCFG0 (*(volatile unsigned long *)0xF3000020)
64#define PCLKCFG1 (*(volatile unsigned long *)0xF3000024)
65#define PCLKCFG2 (*(volatile unsigned long *)0xF3000028)
66#define PCLKCFG3 (*(volatile unsigned long *)0xF300002C)
67#define PCLK_LCD (*(volatile unsigned long *)0xF3000030)
68#define PCLKCFG5 (*(volatile unsigned long *)0xF3000034)
69#define PCLKCFG6 (*(volatile unsigned long *)0xF3000038)
70#define PCLKCFG7 (*(volatile unsigned long *)0xF300003C)
71#define PCLKCFG8 (*(volatile unsigned long *)0xF3000040)
72#define PCLK_TCT (*(volatile unsigned long *)0xF3000044)
73#define PCLKCFG10 (*(volatile unsigned long *)0xF3000048)
74#define PCLKCFG11 (*(volatile unsigned long *)0xF300004C)
75#define PCLK_ADC (*(volatile unsigned long *)0xF3000050)
76#define PCLKCFG13 (*(volatile unsigned long *)0xF3000054)
77#define PCLKCFG14 (*(volatile unsigned long *)0xF3000058)
78#define PCLK_RFREQ (*(volatile unsigned long *)0xF300005C)
79#define PCLKCFG16 (*(volatile unsigned long *)0xF3000060)
80#define PCLKCFG17 (*(volatile unsigned long *)0xF3000064)
81
82#define PCK_EN (1<<28)
83
84#define CKSEL_PLL0 0
85#define CKSEL_PLL1 1
86#define CKSEL_XIN 4
87
88/* IRQ Controller */
89
90#define IEN (*(volatile unsigned long *)0xF3001000)
91#define CREQ (*(volatile unsigned long *)0xF3001004)
92#define IRQSEL (*(volatile unsigned long *)0xF300100C)
93#define MREQ (*(volatile unsigned long *)0xF3001014)
94#define MIRQ (*(volatile unsigned long *)0xF3001028)
95#define MFIQ (*(volatile unsigned long *)0xF300102C)
96#define ALLMASK (*(volatile unsigned long *)0xF3001044)
97#define VAIRQ (*(volatile unsigned long *)0xF3001080)
98#define VAFIQ (*(volatile unsigned long *)0xF3001084)
99#define VNIRQ (*(volatile unsigned long *)0xF3001088)
100#define VNFIQ (*(volatile unsigned long *)0xF300108C)
101
102#define TIMER_IRQ_MASK (1<<6)
103
104/* Timer / Counters */
105
106#define TCFG0 (*(volatile unsigned long *)0xF3003000)
107#define TCNT0 (*(volatile unsigned long *)0xF3003004)
108#define TREF0 (*(volatile unsigned long *)0xF3003008)
109#define TCFG1 (*(volatile unsigned long *)0xF3003010)
110#define TCNT1 (*(volatile unsigned long *)0xF3003014)
111#define TREF1 (*(volatile unsigned long *)0xF3003018)
112
113#define TIREQ (*(volatile unsigned long *)0xF3003060)
114/* ref. value reached */
115#define TF0 (1<<8)
116#define TF1 (1<<9)
117/* irq. status */
118#define TI0 (1<<0)
119#define TI1 (1<<1)
120
121#define TC32EN (*(volatile unsigned long *)0xF3003080)
122#define TC32LDV (*(volatile unsigned long *)0xF3003084)
123#define TC32MCNT (*(volatile unsigned long *)0xF3003094)
124#define TC32IRQ (*(volatile unsigned long *)0xF3003098)
125
126/* ADC */
127
128#define ADCCON (*(volatile unsigned long *)0xF3004000)
129#define ADCDATA (*(volatile unsigned long *)0xF3004004)
130#define ADCCONA (*(volatile unsigned long *)0xF3004080)
131#define ADCSTATUS (*(volatile unsigned long *)0xF3004084)
132#define ADCCFG (*(volatile unsigned long *)0xF3004088)
133
134/* Memory Controller */
135
136#define SDCFG (*(volatile unsigned long *)0xF1000000)
137#define SDFSM (*(volatile unsigned long *)0xF1000004)
138#define MCFG (*(volatile unsigned long *)0xF1000008)
139#define CSCFG0 (*(volatile unsigned long *)0xF1000010)
140#define CSCFG1 (*(volatile unsigned long *)0xF1000014)
141#define CSCFG2 (*(volatile unsigned long *)0xF1000018)
142#define CSCFG3 (*(volatile unsigned long *)0xF100001C)
143#define CLKCFG (*(volatile unsigned long *)0xF1000020)
144#define SDCMD (*(volatile unsigned long *)0xF1000024)
145
146#define SDCFG1 (*(volatile unsigned long *)0xF1001000)
147#define MCFG1 (*(volatile unsigned long *)0xF1001008)
148
149/* Misc */
150
151#define ECFG0 (*(volatile unsigned long *)0xF300500C)
152#define MBCFG (*(volatile unsigned long *)0xF3005020)
153
154#define TCC780_VER (*(volatile unsigned long *)0xE0001FFC)
155
156#endif
diff --git a/firmware/export/timer.h b/firmware/export/timer.h
index f4df8d51d4..21995ef459 100644
--- a/firmware/export/timer.h
+++ b/firmware/export/timer.h
@@ -31,7 +31,7 @@
31 #define TIMER_FREQ (CPU_FREQ/2) 31 #define TIMER_FREQ (CPU_FREQ/2)
32#elif CONFIG_CPU == PNX0101 32#elif CONFIG_CPU == PNX0101
33 #define TIMER_FREQ 3000000 33 #define TIMER_FREQ 3000000
34#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 34#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 || CONFIG_CPU == TCC7801
35 #include "timer-target.h" 35 #include "timer-target.h"
36#elif defined(SIMULATOR) 36#elif defined(SIMULATOR)
37 #define TIMER_FREQ 1000000 37 #define TIMER_FREQ 1000000
diff --git a/firmware/export/wm8985.h b/firmware/export/wm8985.h
new file mode 100644
index 0000000000..9ae5515fa7
--- /dev/null
+++ b/firmware/export/wm8985.h
@@ -0,0 +1,43 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2005 by Dave Chapman
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20#ifndef _WM8985_H
21#define _WM8985_H
22
23/* volume/balance/treble/bass interdependency */
24#define VOLUME_MIN -730
25#define VOLUME_MAX 60
26
27extern int tenthdb2master(int db);
28
29extern void audiohw_enable_output(bool enable);
30extern int audiohw_set_master_vol(int vol_l, int vol_r);
31extern int audiohw_set_lineout_vol(int vol_l, int vol_r);
32extern void audiohw_set_bass(int value);
33extern void audiohw_set_treble(int value);
34extern void audiohw_set_nsorder(int order);
35extern void audiohw_set_sample_rate(int sampling_control);
36
37/* Register addresses */
38// .. tbc
39
40/* Register settings for the supported samplerates: */
41// .. tbc
42
43#endif /* _WM8985_H */
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-12 18:40:51 +0000