diff options
Diffstat (limited to 'firmware/export')
-rw-r--r-- | firmware/export/adc.h | 4 | ||||
-rw-r--r-- | firmware/export/sh7034.h | 15 |
2 files changed, 5 insertions, 14 deletions
diff --git a/firmware/export/adc.h b/firmware/export/adc.h index 044391b536..e2c87fa385 100644 --- a/firmware/export/adc.h +++ b/firmware/export/adc.h | |||
@@ -41,8 +41,6 @@ | |||
41 | #define ADC_BUTTON_ROW1 4 /* Used for scanning the keys, different | 41 | #define ADC_BUTTON_ROW1 4 /* Used for scanning the keys, different |
42 | voltages for different keys */ | 42 | voltages for different keys */ |
43 | #define ADC_UNREG_POWER 7 /* Battery voltage */ | 43 | #define ADC_UNREG_POWER 7 /* Battery voltage */ |
44 | /* FixMe: this doesn't exist, just to make the compiler happy */ | ||
45 | #define ADC_EXT_POWER 5 /* The external power voltage, V=X*0.0148 */ | ||
46 | 44 | ||
47 | #else | 45 | #else |
48 | /* normal JBR channel assignment */ | 46 | /* normal JBR channel assignment */ |
@@ -51,6 +49,8 @@ | |||
51 | #ifdef HAVE_FMADC | 49 | #ifdef HAVE_FMADC |
52 | #define ADC_CHARGE_REGULATOR 0 /* Uh, we read the battery voltage? */ | 50 | #define ADC_CHARGE_REGULATOR 0 /* Uh, we read the battery voltage? */ |
53 | #define ADC_USB_POWER 1 /* USB, reads 0x000 when USB is inserted */ | 51 | #define ADC_USB_POWER 1 /* USB, reads 0x000 when USB is inserted */ |
52 | #define ADC_BUTTON_OFF 2 /* the off button, high value if pressed */ | ||
53 | #define ADC_BUTTON_ON 3 /* the on button, low value if pressed */ | ||
54 | #else | 54 | #else |
55 | #define ADC_CHARGE_REGULATOR 1 /* Regulator reference voltage, should read | 55 | #define ADC_CHARGE_REGULATOR 1 /* Regulator reference voltage, should read |
56 | about 0x1c0 when charging, else 0x3FF */ | 56 | about 0x1c0 when charging, else 0x3FF */ |
diff --git a/firmware/export/sh7034.h b/firmware/export/sh7034.h index 90cbb5a0a4..c15ee2a88f 100644 --- a/firmware/export/sh7034.h +++ b/firmware/export/sh7034.h | |||
@@ -140,7 +140,7 @@ | |||
140 | #define RSTCSR_ADDR 0x05FFFFBB | 140 | #define RSTCSR_ADDR 0x05FFFFBB |
141 | 141 | ||
142 | #define SBYCR_ADDR 0x05FFFFBC | 142 | #define SBYCR_ADDR 0x05FFFFBC |
143 | 143 | ||
144 | #define PADR_ADDR 0x05FFFFC0 | 144 | #define PADR_ADDR 0x05FFFFC0 |
145 | #define PBDR_ADDR 0x05FFFFC2 | 145 | #define PBDR_ADDR 0x05FFFFC2 |
146 | #define PAIOR_ADDR 0x05FFFFC4 | 146 | #define PAIOR_ADDR 0x05FFFFC4 |
@@ -150,7 +150,7 @@ | |||
150 | #define PBCR1_ADDR 0x05FFFFCC | 150 | #define PBCR1_ADDR 0x05FFFFCC |
151 | #define PBCR2_ADDR 0x05FFFFCE | 151 | #define PBCR2_ADDR 0x05FFFFCE |
152 | #define PCDR_ADDR 0x05FFFFD0 | 152 | #define PCDR_ADDR 0x05FFFFD0 |
153 | 153 | ||
154 | #define CASCR_ADDR 0x05FFFFEE | 154 | #define CASCR_ADDR 0x05FFFFEE |
155 | 155 | ||
156 | /* byte halves of the ports */ | 156 | /* byte halves of the ports */ |
@@ -164,15 +164,6 @@ | |||
164 | #define PBIORL_ADDR 0x05FFFFC7 | 164 | #define PBIORL_ADDR 0x05FFFFC7 |
165 | 165 | ||
166 | 166 | ||
167 | /* Port B data register bits */ | ||
168 | #define PBDR_LCD_SDA 0x0001 /* LCD serial data */ | ||
169 | #define PBDR_LCD_SCK 0x0002 /* LCD serial clock */ | ||
170 | #define PBDR_LCD_DC 0x0004 /* LCD data (1) / command (0) */ | ||
171 | #define PBDR_LCD_CS1 0x0008 /* LCD chip select 1 (active low) */ | ||
172 | #define PBDR_BTN_OFF 0x0010 /* Off button (active low) */ | ||
173 | #define PBDR_LED_RED 0x0040 /* Red LED */ | ||
174 | #define PBDR_BTN_ON 0x0100 /* On button (active low) */ | ||
175 | |||
176 | /* A/D control/status register bits */ | 167 | /* A/D control/status register bits */ |
177 | #define ADCSR_CH 0x07 /* Channel/group select */ | 168 | #define ADCSR_CH 0x07 /* Channel/group select */ |
178 | #define ADCSR_CKS 0x08 /* Clock select */ | 169 | #define ADCSR_CKS 0x08 /* Clock select */ |
@@ -195,7 +186,7 @@ | |||
195 | #define SMR1 (*((volatile unsigned char*)SMR1_ADDR)) | 186 | #define SMR1 (*((volatile unsigned char*)SMR1_ADDR)) |
196 | #define BRR1 (*((volatile unsigned char*)BRR1_ADDR)) | 187 | #define BRR1 (*((volatile unsigned char*)BRR1_ADDR)) |
197 | #define SCR1 (*((volatile unsigned char*)SCR1_ADDR)) | 188 | #define SCR1 (*((volatile unsigned char*)SCR1_ADDR)) |
198 | #define TDR1 (*((volatile unsigned char*)TDR1_ADDR)) | 189 | #define TDR1 (*((volatile unsigned char*)TDR1_ADDR)) |
199 | #define SSR1 (*((volatile unsigned char*)SSR1_ADDR)) | 190 | #define SSR1 (*((volatile unsigned char*)SSR1_ADDR)) |
200 | #define RDR1 (*((volatile unsigned char*)RDR1_ADDR)) | 191 | #define RDR1 (*((volatile unsigned char*)RDR1_ADDR)) |
201 | 192 | ||