summaryrefslogtreecommitdiff
path: root/firmware/export
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/export')
-rw-r--r--firmware/export/pp5020.h52
1 files changed, 26 insertions, 26 deletions
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
index 14dd2ba1c1..c5fa83cf1a 100644
--- a/firmware/export/pp5020.h
+++ b/firmware/export/pp5020.h
@@ -57,35 +57,35 @@
57#define DEV_RS (*(volatile unsigned long *)(0x60006004)) 57#define DEV_RS (*(volatile unsigned long *)(0x60006004))
58#define DEV_EN (*(volatile unsigned long *)(0x6000600c)) 58#define DEV_EN (*(volatile unsigned long *)(0x6000600c))
59 59
60#define PP5020_TIMER1 (*(volatile unsigned long *)(0x60005000)) 60#define TIMER1_CFG (*(volatile unsigned long *)(0x60005000))
61#define PP5020_TIMER1_ACK (*(volatile unsigned long *)(0x60005004)) 61#define TIMER1_VAL (*(volatile unsigned long *)(0x60005004))
62#define PP5020_TIMER2 (*(volatile unsigned long *)(0x60005008)) 62#define TIMER2_CFG (*(volatile unsigned long *)(0x60005008))
63#define PP5020_TIMER2_ACK (*(volatile unsigned long *)(0x6000500c)) 63#define TIMER2_VAL (*(volatile unsigned long *)(0x6000500c))
64#define PP5020_TIMER_STATUS (*(volatile unsigned long *)(0x60005010)) 64#define USEC_TIMER (*(volatile unsigned long *)(0x60005010))
65 65
66#define PP5020_CPU_INT_STAT (*(volatile unsigned long*)(0x64004000)) 66#define CPU_INT_STAT (*(volatile unsigned long*)(0x64004000))
67#define PP5020_CPU_HI_INT_STAT (*(volatile unsigned long*)(0x64004100)) 67#define CPU_HI_INT_STAT (*(volatile unsigned long*)(0x64004100))
68#define PP5020_CPU_INT_EN (*(volatile unsigned long*)(0x60004024)) 68#define CPU_INT_EN (*(volatile unsigned long*)(0x60004024))
69#define PP5020_CPU_HI_INT_EN (*(volatile unsigned long*)(0x60004124)) 69#define CPU_HI_INT_EN (*(volatile unsigned long*)(0x60004124))
70#define PP5020_CPU_INT_CLR (*(volatile unsigned long*)(0x60004028)) 70#define CPU_INT_CLR (*(volatile unsigned long*)(0x60004028))
71#define PP5020_CPU_HI_INT_CLR (*(volatile unsigned long*)(0x60004128)) 71#define CPU_HI_INT_CLR (*(volatile unsigned long*)(0x60004128))
72 72
73#define PP5020_TIMER1_IRQ 0 73#define TIMER1_IRQ 0
74#define PP5020_TIMER2_IRQ 1 74#define TIMER2_IRQ 1
75#define PP5020_I2S_IRQ 10 75#define I2S_IRQ 10
76#define PP5020_IDE_IRQ 23 76#define IDE_IRQ 23
77#define PP5020_GPIO_IRQ (32+0) 77#define GPIO_IRQ (32+0)
78#define PP5020_SER0_IRQ (32+4) 78#define SER0_IRQ (32+4)
79#define PP5020_SER1_IRQ (32+5) 79#define SER1_IRQ (32+5)
80#define PP5020_I2C_IRQ (32+8) 80#define I2C_IRQ (32+8)
81 81
82#define PP5020_TIMER1_MASK (1 << PP5020_TIMER1_IRQ) 82#define TIMER1_MASK (1 << TIMER1_IRQ)
83#define PP5020_I2S_MASK (1 << PP5020_I2S_IRQ) 83#define I2S_MASK (1 << I2S_IRQ)
84#define PP5020_IDE_MASK (1 << PP5020_IDE_IRQ) 84#define IDE_MASK (1 << IDE_IRQ)
85#define PP5020_GPIO_MASK (1 << (PP5020_GPIO_IRQ-32)) 85#define GPIO_MASK (1 << (GPIO_IRQ-32))
86#define PP5020_SER0_MASK (1 << (PP5020_SER0_IRQ-32)) 86#define SER0_MASK (1 << (SER0_IRQ-32))
87#define PP5020_SER1_MASK (1 << (PP5020_SER1_IRQ-32)) 87#define SER1_MASK (1 << (SER1_IRQ-32))
88#define PP5020_I2C_MASK (1 << (PP5020_I2C_IRQ-32)) 88#define I2C_MASK (1 << (I2C_IRQ-32))
89 89
90#define USB2D_IDENT (*(volatile unsigned long*)(0xc5000000)) 90#define USB2D_IDENT (*(volatile unsigned long*)(0xc5000000))
91#define USB_STATUS (*(volatile unsigned long*)(0xc50001a4)) 91#define USB_STATUS (*(volatile unsigned long*)(0xc50001a4))