diff options
Diffstat (limited to 'firmware/export/pp5020.h')
-rw-r--r-- | firmware/export/pp5020.h | 90 |
1 files changed, 87 insertions, 3 deletions
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h index af78101583..981ab318c5 100644 --- a/firmware/export/pp5020.h +++ b/firmware/export/pp5020.h | |||
@@ -84,7 +84,7 @@ | |||
84 | #define TIMER1_IRQ 0 | 84 | #define TIMER1_IRQ 0 |
85 | #define TIMER2_IRQ 1 | 85 | #define TIMER2_IRQ 1 |
86 | #define MAILBOX_IRQ 4 | 86 | #define MAILBOX_IRQ 4 |
87 | #define I2S_IRQ 10 | 87 | #define IIS_IRQ 10 |
88 | #define IDE_IRQ 23 | 88 | #define IDE_IRQ 23 |
89 | #define USB_IRQ 24 | 89 | #define USB_IRQ 24 |
90 | #define FIREWIRE_IRQ 25 | 90 | #define FIREWIRE_IRQ 25 |
@@ -97,7 +97,7 @@ | |||
97 | #define TIMER1_MASK (1 << TIMER1_IRQ) | 97 | #define TIMER1_MASK (1 << TIMER1_IRQ) |
98 | #define TIMER2_MASK (1 << TIMER2_IRQ) | 98 | #define TIMER2_MASK (1 << TIMER2_IRQ) |
99 | #define MAILBOX_MASK (1 << MAILBOX_IRQ) | 99 | #define MAILBOX_MASK (1 << MAILBOX_IRQ) |
100 | #define I2S_MASK (1 << I2S_IRQ) | 100 | #define IIS_MASK (1 << IIS_IRQ) |
101 | #define IDE_MASK (1 << IDE_IRQ) | 101 | #define IDE_MASK (1 << IDE_IRQ) |
102 | #define USB_MASK (1 << USB_IRQ) | 102 | #define USB_MASK (1 << USB_IRQ) |
103 | #define FIREWIRE_MASK (1 << FIREWIRE_IRQ) | 103 | #define FIREWIRE_MASK (1 << FIREWIRE_IRQ) |
@@ -307,12 +307,96 @@ | |||
307 | 307 | ||
308 | #define INIT_USB 0x80000000 | 308 | #define INIT_USB 0x80000000 |
309 | 309 | ||
310 | /* I2S */ | 310 | /* IIS */ |
311 | #define IISCONFIG (*(volatile unsigned long*)(0x70002800)) | 311 | #define IISCONFIG (*(volatile unsigned long*)(0x70002800)) |
312 | #define IISFIFO_CFG (*(volatile unsigned long*)(0x7000280c)) | 312 | #define IISFIFO_CFG (*(volatile unsigned long*)(0x7000280c)) |
313 | #define IISFIFO_WR (*(volatile unsigned long*)(0x70002840)) | 313 | #define IISFIFO_WR (*(volatile unsigned long*)(0x70002840)) |
314 | #define IISFIFO_RD (*(volatile unsigned long*)(0x70002880)) | 314 | #define IISFIFO_RD (*(volatile unsigned long*)(0x70002880)) |
315 | 315 | ||
316 | /** | ||
317 | * IISCONFIG bits: | ||
318 | * | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | | ||
319 | * | RESET | |TXFIFOEN|RXFIFOEN| | ???? | MS | ???? | | ||
320 | * | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | | ||
321 | * | | | | | | | | | | ||
322 | * | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | | ||
323 | * | | | | | Bus Format[1:0] | Size[1:0] | | ||
324 | * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | | ||
325 | * | | Size Format[2:0] | ???? | ???? | IRQTX | IRQRX | | ||
326 | */ | ||
327 | |||
328 | /* All IIS formats send MSB first */ | ||
329 | #define IIS_RESET (1 << 31) | ||
330 | #define IIS_TXFIFOEN (1 << 29) | ||
331 | #define IIS_RXFIFOEN (1 << 28) | ||
332 | #define IIS_MASTER (1 << 25) | ||
333 | #define IIS_IRQTX (1 << 1) | ||
334 | #define IIS_IRQRX (1 << 0) | ||
335 | |||
336 | #define IIS_IRQTX_REG IISCONFIG | ||
337 | #define IIS_IRQRX_REG IISCONFIG | ||
338 | |||
339 | /* Data format on the IIS bus */ | ||
340 | #define IIS_FORMAT_MASK (0x3 << 10) | ||
341 | #define IIS_FORMAT_IIS (0x0 << 10) /* Standard IIS - leading dummy bit */ | ||
342 | #define IIS_FORMAT_1 (0x1 << 10) | ||
343 | #define IIS_FORMAT_LJUST (0x2 << 10) /* Left justified - no dummy bit */ | ||
344 | #define IIS_FORMAT_3 (0x3 << 10) | ||
345 | /* Other formats not yet known */ | ||
346 | |||
347 | /* Data size on IIS bus */ | ||
348 | #define IIS_SIZE_MASK (0x3 << 8) | ||
349 | #define IIS_SIZE_16BIT (0x0 << 8) | ||
350 | /* Other sizes not yet known */ | ||
351 | |||
352 | /* Data size/format on IIS FIFO */ | ||
353 | #define IIS_FIFO_FORMAT_MASK (0x7 << 4) | ||
354 | #define IIS_FIFO_FORMAT_0 (0x0 << 4) | ||
355 | /* Big-endian formats - data sent to the FIFO must be big endian. | ||
356 | * I forgot which is which size but did test them. */ | ||
357 | #define IIS_FIFO_FORMAT_1 (0x1 << 4) | ||
358 | #define IIS_FIFO_FORMAT_2 (0x2 << 4) | ||
359 | /* 32bit-MSB-little endian */ | ||
360 | #define IIS_FIFO_FORMAT_LE32 (0x3 << 4) | ||
361 | /* 16bit-MSB-little endian */ | ||
362 | #define IIS_FIFO_FORMAT_LE16 (0x4 << 4) | ||
363 | |||
364 | /* FIFO formats 0x5 and above seem equivalent to 0x4 ?? */ | ||
365 | |||
366 | /** | ||
367 | * IISFIFO_CFG bits: | ||
368 | * | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | | ||
369 | * | | | RXFull[5:0] | | ||
370 | * | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | | ||
371 | * | | | TXFree[5:0] | | ||
372 | * | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | | ||
373 | * | | | | RXCLR | | | | TXCLR | | ||
374 | * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | | ||
375 | * | | | RX_FULL_LVL | | | TX_EMPTY_LVL | | ||
376 | */ | ||
377 | |||
378 | /* handy macros to extract the FIFO counts */ | ||
379 | #define IIS_RX_FULL_MASK (0x3f << 24) | ||
380 | #define IIS_RX_FULL_COUNT \ | ||
381 | ((IISFIFO_CFG & IIS_RX_FULL_MASK) >> 24) | ||
382 | |||
383 | #define IIS_TX_FREE_MASK (0x3f << 16) | ||
384 | #define IIS_TX_FREE_COUNT \ | ||
385 | ((IISFIFO_CFG & IIS_TX_FREE_MASK) >> 16) | ||
386 | |||
387 | #define IIS_RXCLR (1 << 12) | ||
388 | #define IIS_TXCLR (1 << 8) | ||
389 | /* Number of slots */ | ||
390 | #define IIS_RX_FULL_LVL_4 (0x1 << 4) | ||
391 | #define IIS_RX_FULL_LVL_8 (0x2 << 4) | ||
392 | #define IIS_RX_FULL_LVL_12 (0x3 << 4) | ||
393 | |||
394 | #define IIS_TX_EMPTY_LVL_4 (0x1 << 0) | ||
395 | #define IIS_TX_EMPTY_LVL_8 (0x2 << 0) | ||
396 | #define IIS_TX_EMPTY_LVL_12 (0x3 << 0) | ||
397 | |||
398 | /* Note: didn't bother to see of levels 0 and 16 actually work */ | ||
399 | |||
316 | /* Serial Controller */ | 400 | /* Serial Controller */ |
317 | #define SERIAL0 (*(volatile unsigned long*)(0x70006000)) | 401 | #define SERIAL0 (*(volatile unsigned long*)(0x70006000)) |
318 | #define SERIAL1 (*(volatile unsigned long*)(0x70006040)) | 402 | #define SERIAL1 (*(volatile unsigned long*)(0x70006040)) |