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-rw-r--r--firmware/export/pl180.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/firmware/export/pl180.h b/firmware/export/pl180.h
index 98993cc244..4c439fb431 100644
--- a/firmware/export/pl180.h
+++ b/firmware/export/pl180.h
@@ -22,6 +22,8 @@
22/* ARM PrimeCell PL180 SD/MMC controller */ 22/* ARM PrimeCell PL180 SD/MMC controller */
23 23
24/* MCIStatus bits */ 24/* MCIStatus bits */
25
26/* bits 10:0 can be cleared by a write in MCIClear */
25#define MCI_CMD_CRC_FAIL (1<<0) 27#define MCI_CMD_CRC_FAIL (1<<0)
26#define MCI_DATA_CRC_FAIL (1<<1) 28#define MCI_DATA_CRC_FAIL (1<<1)
27#define MCI_CMD_TIMEOUT (1<<2) 29#define MCI_CMD_TIMEOUT (1<<2)
@@ -33,7 +35,18 @@
33#define MCI_DATA_END (1<<8) 35#define MCI_DATA_END (1<<8)
34#define MCI_START_BIT_ERR (1<<9) 36#define MCI_START_BIT_ERR (1<<9)
35#define MCI_DATA_BLOCK_END (1<<10) 37#define MCI_DATA_BLOCK_END (1<<10)
36#define MCI_CMD_ACTIVE (1<<11) 38/* bits 21:11 are only cleared by the hardware logic */
39#define MCI_CMD_ACTIVE (1<<11)
40#define MCI_TX_ACTIVE (1<<12)
41#define MCI_RX_ACTIVE (1<<13)
42#define MCI_TX_FIFO_HALF_EMPTY (1<<14)
43#define MCI_RX_FIFO_HALF_FULL (1<<15)
44#define MCI_TX_FIFO_FULL (1<<16)
45#define MCI_RX_FIFO_FULL (1<<17)
46#define MCI_TX_FIFO_EMPTY (1<<18)
47#define MCI_RX_FIFO_EMPTY (1<<19)
48#define MCI_TX_DATA_AVAIL (1<<20)
49#define MCI_RX_DATA_AVAIL (1<<21)
37 50
38 51
39/* MCIPower bits */ 52/* MCIPower bits */