summaryrefslogtreecommitdiff
path: root/firmware/export/imx31l.h
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/export/imx31l.h')
-rwxr-xr-xfirmware/export/imx31l.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/firmware/export/imx31l.h b/firmware/export/imx31l.h
index 1712a5b8f2..b1f35e80f2 100755
--- a/firmware/export/imx31l.h
+++ b/firmware/export/imx31l.h
@@ -23,7 +23,8 @@
23#define REG16_PTR_T volatile unsigned short * 23#define REG16_PTR_T volatile unsigned short *
24#define REG32_PTR_T volatile unsigned long * 24#define REG32_PTR_T volatile unsigned long *
25 25
26#define TTB_BASE_ADDR (0x80000000 + (64*1024*1024)-TTB_SIZE) 26/* Place in the section with the framebuffer */
27#define TTB_BASE_ADDR (0x80100000 + 0x00100000 - TTB_SIZE)
27#define IRAM_BASE_ADDR 0x1fffc000 28#define IRAM_BASE_ADDR 0x1fffc000
28#define L2CC_BASE_ADDR 0x30000000 29#define L2CC_BASE_ADDR 0x30000000
29 30
@@ -275,6 +276,7 @@
275#define INTENABLEL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x14)) 276#define INTENABLEL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x14))
276#define INTTYPEH (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x18)) 277#define INTTYPEH (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x18))
277#define INTTYPEL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x1C)) 278#define INTTYPEL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x1C))
279#define NIPRIORITY(n) (((REG32_PTR_T)(AVIC_BASE_ADDR+0x20))[n])
278#define NIPRIORITY7 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x20)) 280#define NIPRIORITY7 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x20))
279#define NIPRIORITY6 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x24)) 281#define NIPRIORITY6 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x24))
280#define NIPRIORITY5 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x28)) 282#define NIPRIORITY5 (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x28))
@@ -294,7 +296,7 @@
294#define FIPNDH (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x60)) 296#define FIPNDH (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x60))
295#define FIPNDL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x64)) 297#define FIPNDL (*(REG32_PTR_T)(AVIC_BASE_ADDR+0x64))
296#define VECTOR_BASE_ADDR (AVIC_BASE_ADDR+0x100) 298#define VECTOR_BASE_ADDR (AVIC_BASE_ADDR+0x100)
297#define VECTOR(n) (*(REG32_PTR_T)(VECTOR_BASE_ADDR+((n)*4))) 299#define VECTOR(n) (((REG32_PTR_T)VECTOR_BASE_ADDR)[n])
298 300
299/* The vectors go all the way up to 63. 4 bytes for each */ 301/* The vectors go all the way up to 63. 4 bytes for each */
300#define INTCNTL_ABFLAG (1 << 25) 302#define INTCNTL_ABFLAG (1 << 25)