diff options
Diffstat (limited to 'firmware/export/config.h')
-rw-r--r-- | firmware/export/config.h | 124 |
1 files changed, 66 insertions, 58 deletions
diff --git a/firmware/export/config.h b/firmware/export/config.h index aa3f4f8d40..95bf2fb73b 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h | |||
@@ -68,6 +68,7 @@ | |||
68 | #define TCC773L 773 | 68 | #define TCC773L 773 |
69 | #define TCC7801 7801 | 69 | #define TCC7801 7801 |
70 | #define S5L8700 8700 | 70 | #define S5L8700 8700 |
71 | #define S5L8701 8701 | ||
71 | #define JZ4732 4732 | 72 | #define JZ4732 4732 |
72 | #define AS3525 3525 | 73 | #define AS3525 3525 |
73 | #define AT91SAM9260 9260 | 74 | #define AT91SAM9260 9260 |
@@ -387,6 +388,69 @@ Lyre prototype 1*/ | |||
387 | /* setup basic macros from capability masks */ | 388 | /* setup basic macros from capability masks */ |
388 | #include "config_caps.h" | 389 | #include "config_caps.h" |
389 | 390 | ||
391 | /* setup CPU-specific defines */ | ||
392 | |||
393 | /* define for all cpus from SH family */ | ||
394 | #if (CONFIG_CPU == SH7034) | ||
395 | #define CPU_SH | ||
396 | #endif | ||
397 | |||
398 | /* define for all cpus from coldfire family */ | ||
399 | #if (CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250) | ||
400 | #define CPU_COLDFIRE | ||
401 | #endif | ||
402 | |||
403 | /* define for all cpus from PP family */ | ||
404 | #if (CONFIG_CPU == PP5002) | ||
405 | #define CPU_PP | ||
406 | #elif (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022) \ | ||
407 | || (CONFIG_CPU == PP5024) || (CONFIG_CPU == PP6100) | ||
408 | #define CPU_PP | ||
409 | #define CPU_PP502x | ||
410 | #endif | ||
411 | |||
412 | /* define for all cpus from S5L870X family */ | ||
413 | #if (CONFIG_CPU == S5L8700) || (CONFIG_CPU == S5L8701) | ||
414 | #define CPU_S5L870X | ||
415 | #endif | ||
416 | |||
417 | /* define for all cpus from TCC77X family */ | ||
418 | #if (CONFIG_CPU == TCC771L) || (CONFIG_CPU == TCC773L) || (CONFIG_CPU == TCC770) | ||
419 | #define CPU_TCC77X | ||
420 | #endif | ||
421 | |||
422 | /* define for all cpus from TCC780 family */ | ||
423 | #if (CONFIG_CPU == TCC7801) | ||
424 | #define CPU_TCC780X | ||
425 | #endif | ||
426 | |||
427 | /* define for all cpus from ARM7TDMI family (for specific optimisations) */ | ||
428 | #if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25) | ||
429 | #define CPU_ARM7TDMI | ||
430 | #endif | ||
431 | |||
432 | /* define for all cpus from ARM family */ | ||
433 | #if (CONFIG_CPU == IMX31L) | ||
434 | #define CPU_ARM | ||
435 | #define ARM_ARCH 6 /* ARMv6 */ | ||
436 | #endif | ||
437 | |||
438 | #if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320) \ | ||
439 | || (CONFIG_CPU == AT91SAM9260) | ||
440 | #define CPU_ARM | ||
441 | #define ARM_ARCH 5 /* ARMv5 */ | ||
442 | #endif | ||
443 | |||
444 | #if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \ | ||
445 | || (CONFIG_CPU == DSC25) || defined(CPU_S5L870X) || (CONFIG_CPU == AS3525) | ||
446 | #define CPU_ARM | ||
447 | #define ARM_ARCH 4 /* ARMv4 */ | ||
448 | #endif | ||
449 | |||
450 | #if (CONFIG_CPU == JZ4732) | ||
451 | #define CPU_MIPS 32 | ||
452 | #endif | ||
453 | |||
390 | /* now set any CONFIG_ defines correctly if they are not used, | 454 | /* now set any CONFIG_ defines correctly if they are not used, |
391 | No need to do this on CONFIG_'s which are compulsory (e.g CONFIG_CODEC ) */ | 455 | No need to do this on CONFIG_'s which are compulsory (e.g CONFIG_CODEC ) */ |
392 | 456 | ||
@@ -561,68 +625,12 @@ Lyre prototype 1*/ | |||
561 | 625 | ||
562 | #if defined(HAVE_USBSTACK) || (CONFIG_CPU == JZ4732) \ | 626 | #if defined(HAVE_USBSTACK) || (CONFIG_CPU == JZ4732) \ |
563 | || (CONFIG_CPU == AS3525) || (CONFIG_CPU == S3C2440) \ | 627 | || (CONFIG_CPU == AS3525) || (CONFIG_CPU == S3C2440) \ |
564 | || (CONFIG_CPU == S5L8700) | 628 | || defined(CPU_S5L870X) |
565 | #define HAVE_WAKEUP_OBJECTS | 629 | #define HAVE_WAKEUP_OBJECTS |
566 | #endif | 630 | #endif |
567 | 631 | ||
568 | #endif /* (CONFIG_CODEC == SWCODEC) */ | 632 | #endif /* (CONFIG_CODEC == SWCODEC) */ |
569 | 633 | ||
570 | /* define for all cpus from SH family */ | ||
571 | #if (CONFIG_CPU == SH7034) | ||
572 | #define CPU_SH | ||
573 | #endif | ||
574 | |||
575 | /* define for all cpus from coldfire family */ | ||
576 | #if (CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250) | ||
577 | #define CPU_COLDFIRE | ||
578 | #endif | ||
579 | |||
580 | /* define for all cpus from PP family */ | ||
581 | #if (CONFIG_CPU == PP5002) | ||
582 | #define CPU_PP | ||
583 | #elif (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022) \ | ||
584 | || (CONFIG_CPU == PP5024) || (CONFIG_CPU == PP6100) | ||
585 | #define CPU_PP | ||
586 | #define CPU_PP502x | ||
587 | #endif | ||
588 | |||
589 | /* define for all cpus from TCC77X family */ | ||
590 | #if (CONFIG_CPU == TCC771L) || (CONFIG_CPU == TCC773L) || (CONFIG_CPU == TCC770) | ||
591 | #define CPU_TCC77X | ||
592 | #endif | ||
593 | |||
594 | /* define for all cpus from TCC780 family */ | ||
595 | #if (CONFIG_CPU == TCC7801) | ||
596 | #define CPU_TCC780X | ||
597 | #endif | ||
598 | |||
599 | /* define for all cpus from ARM7TDMI family (for specific optimisations) */ | ||
600 | #if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25) | ||
601 | #define CPU_ARM7TDMI | ||
602 | #endif | ||
603 | |||
604 | /* define for all cpus from ARM family */ | ||
605 | #if (CONFIG_CPU == IMX31L) | ||
606 | #define CPU_ARM | ||
607 | #define ARM_ARCH 6 /* ARMv6 */ | ||
608 | #endif | ||
609 | |||
610 | #if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320) \ | ||
611 | || (CONFIG_CPU == AT91SAM9260) | ||
612 | #define CPU_ARM | ||
613 | #define ARM_ARCH 5 /* ARMv5 */ | ||
614 | #endif | ||
615 | |||
616 | #if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \ | ||
617 | || (CONFIG_CPU == DSC25) || (CONFIG_CPU == S5L8700) || (CONFIG_CPU == AS3525) | ||
618 | #define CPU_ARM | ||
619 | #define ARM_ARCH 4 /* ARMv4 */ | ||
620 | #endif | ||
621 | |||
622 | #if (CONFIG_CPU == JZ4732) | ||
623 | #define CPU_MIPS 32 | ||
624 | #endif | ||
625 | |||
626 | /* Determine if accesses should be strictly long aligned. */ | 634 | /* Determine if accesses should be strictly long aligned. */ |
627 | #if (CONFIG_CPU == SH7034) || defined(CPU_ARM) || defined(CPU_MIPS) | 635 | #if (CONFIG_CPU == SH7034) || defined(CPU_ARM) || defined(CPU_MIPS) |
628 | #define ROCKBOX_STRICT_ALIGN 1 | 636 | #define ROCKBOX_STRICT_ALIGN 1 |
@@ -648,7 +656,7 @@ Lyre prototype 1*/ | |||
648 | (CONFIG_CPU == AS3525 && MEMORYSIZE > 2) || /* AS3525 +2MB: core, plugins, codecs */ \ | 656 | (CONFIG_CPU == AS3525 && MEMORYSIZE > 2) || /* AS3525 +2MB: core, plugins, codecs */ \ |
649 | (CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525 2MB:core only */ \ | 657 | (CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525 2MB:core only */ \ |
650 | (CONFIG_CPU == PNX0101) || \ | 658 | (CONFIG_CPU == PNX0101) || \ |
651 | (CONFIG_CPU == S5L8700)) /* Samsung S5L8700: core, plugins, codecs */ || \ | 659 | defined(CPU_S5L870X)) || /* Samsung S5L8700: core, plugins, codecs */ \ |
652 | (CONFIG_CPU == JZ4732 && !defined(PLUGIN) && !defined(CODEC)) /* Jz4740: core only */ | 660 | (CONFIG_CPU == JZ4732 && !defined(PLUGIN) && !defined(CODEC)) /* Jz4740: core only */ |
653 | #define ICODE_ATTR __attribute__ ((section(".icode"))) | 661 | #define ICODE_ATTR __attribute__ ((section(".icode"))) |
654 | #define ICONST_ATTR __attribute__ ((section(".irodata"))) | 662 | #define ICONST_ATTR __attribute__ ((section(".irodata"))) |