diff options
Diffstat (limited to 'firmware/export/axp192-defs.h')
-rw-r--r-- | firmware/export/axp192-defs.h | 308 |
1 files changed, 0 insertions, 308 deletions
diff --git a/firmware/export/axp192-defs.h b/firmware/export/axp192-defs.h deleted file mode 100644 index 13b465351b..0000000000 --- a/firmware/export/axp192-defs.h +++ /dev/null | |||
@@ -1,308 +0,0 @@ | |||
1 | /* Internal header for axp192 driver - not for general inclusion */ | ||
2 | |||
3 | #ifndef DEFREG | ||
4 | # define DEFREG(...) | ||
5 | #endif | ||
6 | #ifndef DEFFLD | ||
7 | # define DEFFLD(...) | ||
8 | #endif | ||
9 | |||
10 | #define DEFBIT(regname, fldname, bitpos, ...) \ | ||
11 | DEFFLD(regname, fldname, bitpos, bitpos, __VA_ARGS__) | ||
12 | |||
13 | DEFREG(PWRSTS, 0x00) | ||
14 | DEFREG(CHGSTS, 0x01) | ||
15 | DEFREG(CHIPID, 0x03) | ||
16 | DEFREG(VBUSSTS, 0x04) | ||
17 | DEFREG(DATA0, 0x06) | ||
18 | DEFREG(DATA1, 0x07) | ||
19 | DEFREG(DATA2, 0x08) | ||
20 | DEFREG(DATA3, 0x09) | ||
21 | DEFREG(DATA4, 0x0a) | ||
22 | DEFREG(DATA5, 0x0b) | ||
23 | DEFREG(PWRCTL1, 0x10) | ||
24 | DEFREG(PWRCTL2, 0x12) | ||
25 | DEFREG(DCDC2VOLT, 0x23) | ||
26 | DEFREG(DCDC2RAMP, 0x25) | ||
27 | DEFREG(DCDC1VOLT, 0x26) | ||
28 | DEFREG(DCDC3VOLT, 0x27) | ||
29 | DEFREG(LDO2LDO3VOLT, 0x28) | ||
30 | DEFREG(VBUSIPSOUT, 0x30) | ||
31 | DEFREG(VOFF, 0x31) | ||
32 | DEFREG(PWROFF, 0x32) | ||
33 | DEFREG(CHGCTL1, 0x33) | ||
34 | DEFREG(CHGCTL2, 0x34) | ||
35 | DEFREG(BKPCHGCTL, 0x35) | ||
36 | DEFREG(PEKPARAM, 0x36) | ||
37 | DEFREG(DCDCFREQ, 0x37) | ||
38 | DEFREG(VLTFCHG, 0x38) | ||
39 | DEFREG(VHTFCHG, 0x39) | ||
40 | DEFREG(APSLOW1, 0x3a) | ||
41 | DEFREG(APSLOW2, 0x3b) | ||
42 | DEFREG(VLTFDCHG, 0x3c) | ||
43 | DEFREG(VHTFDCHG, 0x3d) | ||
44 | DEFREG(IRQEN1, 0x40) | ||
45 | DEFREG(IRQEN2, 0x41) | ||
46 | DEFREG(IRQEN3, 0x42) | ||
47 | DEFREG(IRQEN4, 0x43) | ||
48 | DEFREG(IRQSTS1, 0x44) | ||
49 | DEFREG(IRQSTS2, 0x45) | ||
50 | DEFREG(IRQSTS3, 0x46) | ||
51 | DEFREG(IRQSTS4, 0x47) | ||
52 | DEFREG(IRQEN5, 0x4a) | ||
53 | DEFREG(IRQSTS5, 0x4d) | ||
54 | DEFREG(DCDCMODE, 0x80) | ||
55 | DEFREG(ADCEN1, 0x82) | ||
56 | DEFREG(ADCEN2, 0x83) | ||
57 | DEFREG(ADCCTL, 0x84) | ||
58 | DEFREG(ADCRANGE, 0x85) | ||
59 | DEFREG(TIMERCTL, 0x8a) | ||
60 | DEFREG(VBUSSRP, 0x8b) | ||
61 | DEFREG(OTPOWEROFF, 0x8f) | ||
62 | DEFREG(GPIO0FUNC, 0x90) | ||
63 | DEFREG(GPIO0LDO, 0x91) | ||
64 | DEFREG(GPIO1FUNC, 0x92) | ||
65 | DEFREG(GPIO2FUNC, 0x93) | ||
66 | DEFREG(GPIOLEVEL1, 0x94) | ||
67 | DEFREG(GPIO3GPIO4FUNC, 0x95) | ||
68 | DEFREG(GPIOLEVEL2, 0x96) | ||
69 | DEFREG(GPIOPULL, 0x97) | ||
70 | DEFREG(PWM1X, 0x98) | ||
71 | DEFREG(PWM1Y1, 0x99) | ||
72 | DEFREG(PWM1Y2, 0x9a) | ||
73 | DEFREG(PWM2X, 0x9b) | ||
74 | DEFREG(PWM2Y1, 0x9c) | ||
75 | DEFREG(PWM2Y2, 0x9d) | ||
76 | DEFREG(NRSTO, 0x9e) | ||
77 | DEFREG(CC_CTL, 0xb8) | ||
78 | |||
79 | DEFBIT(PWRSTS, ACIN_PRESENT, 7) | ||
80 | DEFBIT(PWRSTS, ACIN_VALID, 6) | ||
81 | DEFBIT(PWRSTS, VBUS_PRESENT, 5) | ||
82 | DEFBIT(PWRSTS, VBUS_VALID, 4) | ||
83 | DEFBIT(PWRSTS, VBUS_VHOLD, 3) | ||
84 | DEFBIT(PWRSTS, BATT_CURR_DIR, 2) | ||
85 | DEFBIT(PWRSTS, PCB_SHORTED, 1) | ||
86 | DEFBIT(PWRSTS, BOOT_TRIG, 0) | ||
87 | |||
88 | DEFBIT(VBUSSTS, VALID, 2) | ||
89 | DEFBIT(VBUSSTS, SESS_AB_VALID, 1) | ||
90 | DEFBIT(VBUSSTS, SESS_END, 0) | ||
91 | |||
92 | DEFBIT(CHGSTS, OVER_TEMP, 7) | ||
93 | DEFBIT(CHGSTS, CHARGING, 6) | ||
94 | DEFBIT(CHGSTS, BATT_PRESENT, 5) | ||
95 | DEFBIT(CHGSTS, BATT_ERROR, 3) | ||
96 | DEFBIT(CHGSTS, LOW_CHARGE, 2) | ||
97 | |||
98 | /* NOTE: These two bits are mirrored in the upper nibble of PWRCTL2. | ||
99 | * Modifications through one register will immediately reflect in the | ||
100 | * other register. */ | ||
101 | DEFBIT(PWRCTL1, EXTEN_SW, 2) | ||
102 | DEFBIT(PWRCTL1, DCDC2_SW, 0) | ||
103 | |||
104 | DEFBIT(PWRCTL2, EXTEN_SW, 6) | ||
105 | DEFBIT(PWRCTL2, DCDC2_SW, 4) | ||
106 | DEFBIT(PWRCTL2, LDO3_SW, 3) | ||
107 | DEFBIT(PWRCTL2, LDO2_SW, 2) | ||
108 | DEFBIT(PWRCTL2, DCDC3_SW, 1) | ||
109 | DEFBIT(PWRCTL2, DCDC1_SW, 0) | ||
110 | |||
111 | DEFFLD(DCDC2VOLT, VALUE, 5, 0) | ||
112 | |||
113 | DEFBIT(DCDC2RAMP, ENABLE, 2) | ||
114 | DEFBIT(DCDC2RAMP, SLOPE, 0) | ||
115 | |||
116 | DEFFLD(DCDC1VOLT, VALUE, 6, 0) | ||
117 | DEFFLD(DCDC3VOLT, VALUE, 6, 0) | ||
118 | |||
119 | DEFFLD(LDO2LDO3VOLT, LDO2_VALUE, 7, 4) | ||
120 | DEFFLD(LDO2LDO3VOLT, LDO3_VALUE, 3, 0) | ||
121 | |||
122 | DEFBIT(VBUSIPSOUT, ACCESS, 7) | ||
123 | DEFBIT(VBUSIPSOUT, VHOLD_LIM, 6) | ||
124 | DEFFLD(VBUSIPSOUT, VHOLD_LEV, 5, 3) | ||
125 | DEFBIT(VBUSIPSOUT, VBUS_LIM, 1) | ||
126 | DEFBIT(VBUSIPSOUT, LIM_100mA, 0) | ||
127 | |||
128 | DEFFLD(VOFF, VALUE, 3, 0) | ||
129 | |||
130 | DEFBIT(PWROFF, SHUTDOWN, 7) | ||
131 | DEFBIT(PWROFF, MON_EN, 6) | ||
132 | DEFFLD(PWROFF, LEDFUNC, 5, 4) | ||
133 | DEFBIT(PWROFF, LEDCTL, 3) | ||
134 | DEFBIT(PWROFF, DELAY, 1, 0) | ||
135 | |||
136 | DEFBIT(CHGCTL1, CHARGE_EN, 7) | ||
137 | DEFFLD(CHGCTL1, CHARGE_TGT, 6, 5) | ||
138 | DEFBIT(CHGCTL1, CHARGE_ENDCURR, 4) | ||
139 | DEFFLD(CHGCTL1, CHARGE_CURRENT, 3, 0) | ||
140 | |||
141 | DEFFLD(CHGCTL2, PRECHARGE_OT, 7, 6) | ||
142 | DEFFLD(CHGCTL2, EACCESS_CURRENT, 5, 3) | ||
143 | DEFBIT(CHGCTL2, EACCESS_CHG_EN, 2) | ||
144 | DEFFLD(CHGCTL2, CONST_CURR_OT, 1, 0) | ||
145 | |||
146 | DEFBIT(BKPCHGCTL, ENABLE, 7) | ||
147 | DEFFLD(BKPCHGCTL, TGT_VOLTAGE, 6, 5) | ||
148 | DEFFLD(BKPCHGCTL, CHARGE_CURRENT, 1, 0) | ||
149 | |||
150 | DEFFLD(PEKPARAM, POWER_ON_TIME, 7, 6) | ||
151 | DEFFLD(PEKPARAM, LONG_TIME, 5, 4) | ||
152 | DEFBIT(PEKPARAM, POWEROFF_EN, 3) | ||
153 | DEFBIT(PEKPARAM, PWROK_DELAY, 2) | ||
154 | DEFFLD(PEKPARAM, POWEROFF_TIME, 1, 0) | ||
155 | |||
156 | DEFFLD(DCDCFREQ, VALUE, 3, 0) | ||
157 | DEFFLD(VLTFCHG, VALUE, 7, 0) | ||
158 | DEFFLD(VHTFCHG, VALUE, 7, 0) | ||
159 | DEFFLD(APSLOW1, VALUE, 7, 0) | ||
160 | DEFFLD(APSLOW2, VALUE, 7, 0) | ||
161 | DEFFLD(VLTFDCHG, VALUE, 7, 0) | ||
162 | DEFFLD(VHTFDCHG, VALUE, 7, 0) | ||
163 | |||
164 | DEFBIT(IRQEN1, ACIN_OVER_VOLTAGE, 7) | ||
165 | DEFBIT(IRQEN1, ACIN_INSERT, 6) | ||
166 | DEFBIT(IRQEN1, ACIN_REMOVE, 5) | ||
167 | DEFBIT(IRQEN1, VBUS_OVER_VOLTAGE, 4) | ||
168 | DEFBIT(IRQEN1, VBUS_INSERT, 3) | ||
169 | DEFBIT(IRQEN1, VBUS_REMOVE, 2) | ||
170 | DEFBIT(IRQEN1, VBUS_BELOW_VHOLD, 1) | ||
171 | DEFBIT(IRQEN2, BATTERY_INSERT, 7) | ||
172 | DEFBIT(IRQEN2, BATTERY_REMOVE, 6) | ||
173 | DEFBIT(IRQEN2, BATTERY_ERROR, 5) | ||
174 | DEFBIT(IRQEN2, BATTERY_ERROR_CLR, 4) | ||
175 | DEFBIT(IRQEN2, CHARGING_STARTED, 3) | ||
176 | DEFBIT(IRQEN2, CHARGING_COMPLETE, 2) | ||
177 | DEFBIT(IRQEN2, BATTERY_OVER_TEMP, 1) | ||
178 | DEFBIT(IRQEN2, BATTERY_UNDER_TEMP, 0) | ||
179 | DEFBIT(IRQEN3, INTERNAL_OVER_TEMP, 7) | ||
180 | DEFBIT(IRQEN3, LOW_CHARGE_CURRENT, 6) | ||
181 | DEFBIT(IRQEN3, DCDC1_UNDER_VOLT, 5) | ||
182 | DEFBIT(IRQEN3, DCDC2_UNDER_VOLT, 4) | ||
183 | DEFBIT(IRQEN3, DCDC3_UNDER_VOLT, 3) | ||
184 | DEFBIT(IRQEN3, SHORT_PRESS, 1) | ||
185 | DEFBIT(IRQEN3, LONG_PRESS, 0) | ||
186 | DEFBIT(IRQEN4, POWER_ON_N_OE, 7) | ||
187 | DEFBIT(IRQEN4, POWER_OFF_N_OE, 6) | ||
188 | DEFBIT(IRQEN4, VBUS_VALID, 5) | ||
189 | DEFBIT(IRQEN4, VBUS_INVALID, 4) | ||
190 | DEFBIT(IRQEN4, VBUS_SESS_AB, 3) | ||
191 | DEFBIT(IRQEN4, VBUS_SESS_END, 2) | ||
192 | DEFBIT(IRQEN4, APS_UNDER_VOLT, 0) | ||
193 | |||
194 | DEFBIT(IRQSTS1, ACIN_OVER_VOLTAGE, 7) | ||
195 | DEFBIT(IRQSTS1, ACIN_INSERT, 6) | ||
196 | DEFBIT(IRQSTS1, ACIN_REMOVE, 5) | ||
197 | DEFBIT(IRQSTS1, VBUS_OVER_VOLTAGE, 4) | ||
198 | DEFBIT(IRQSTS1, VBUS_INSERT, 3) | ||
199 | DEFBIT(IRQSTS1, VBUS_REMOVE, 2) | ||
200 | DEFBIT(IRQSTS1, VBUS_BELOW_VHOLD, 1) | ||
201 | DEFBIT(IRQSTS2, BATTERY_INSERT, 7) | ||
202 | DEFBIT(IRQSTS2, BATTERY_REMOVE, 6) | ||
203 | DEFBIT(IRQSTS2, BATTERY_ERROR, 5) | ||
204 | DEFBIT(IRQSTS2, BATTERY_ERROR_CLR, 4) | ||
205 | DEFBIT(IRQSTS2, CHARGING_STARTED, 3) | ||
206 | DEFBIT(IRQSTS2, CHARGING_STOPPED, 2) | ||
207 | DEFBIT(IRQSTS2, BATTERY_OVER_TEMP, 1) | ||
208 | DEFBIT(IRQSTS2, BATTERY_UNDER_TEMP, 0) | ||
209 | DEFBIT(IRQSTS3, INTERNAL_OVER_TEMP, 7) | ||
210 | DEFBIT(IRQSTS3, LOW_CHARGE_CURRENT, 6) | ||
211 | DEFBIT(IRQSTS3, DCDC1_UNDER_VOLT, 5) | ||
212 | DEFBIT(IRQSTS3, DCDC2_UNDER_VOLT, 4) | ||
213 | DEFBIT(IRQSTS3, DCDC3_UNDER_VOLT, 3) | ||
214 | DEFBIT(IRQSTS3, SHORT_PRESS, 1) | ||
215 | DEFBIT(IRQSTS3, LONG_PRESS, 0) | ||
216 | DEFBIT(IRQSTS4, POWER_ON_N_OE, 7) | ||
217 | DEFBIT(IRQSTS4, POWER_OFF_N_OE, 6) | ||
218 | DEFBIT(IRQSTS4, VBUS_VALID, 5) | ||
219 | DEFBIT(IRQSTS4, VBUS_INVALID, 4) | ||
220 | DEFBIT(IRQSTS4, VBUS_SESS_AB, 3) | ||
221 | DEFBIT(IRQSTS4, VBUS_SESS_END, 2) | ||
222 | DEFBIT(IRQSTS4, APS_UNDER_VOLT, 0) | ||
223 | |||
224 | /* NOTE: IRQEN5 and IRQSTS5 are only listed on the Chinese datasheet. */ | ||
225 | DEFBIT(IRQEN5, TIME_OUT, 7) | ||
226 | DEFBIT(IRQEN5, GPIO2_CHANGE, 2) | ||
227 | DEFBIT(IRQEN5, GPIO1_CHANGE, 1) | ||
228 | DEFBIT(IRQEN5, GPIO0_CHANGE, 0) | ||
229 | |||
230 | DEFBIT(IRQSTS5, TIME_OUT, 7) | ||
231 | DEFBIT(IRQSTS5, GPIO2_CHANGE, 2) | ||
232 | DEFBIT(IRQSTS5, GPIO1_CHANGE, 1) | ||
233 | DEFBIT(IRQSTS5, GPIO0_CHANGE, 0) | ||
234 | |||
235 | DEFFLD(DCDCMODE, VALUE, 3, 1) | ||
236 | |||
237 | DEFBIT(ADCEN1, BATTERY_VOLTAGE, 7) | ||
238 | DEFBIT(ADCEN1, BATTERY_CURRENT, 6) | ||
239 | DEFBIT(ADCEN1, ACIN_VOLTAGE, 5) | ||
240 | DEFBIT(ADCEN1, ACIN_CURRENT, 4) | ||
241 | DEFBIT(ADCEN1, VBUS_VOLTAGE, 3) | ||
242 | DEFBIT(ADCEN1, VBUS_CURRENT, 2) | ||
243 | DEFBIT(ADCEN1, APS_VOLTAGE, 1) | ||
244 | DEFBIT(ADCEN1, TS_PIN, 0) | ||
245 | |||
246 | DEFBIT(ADCEN2, INTERNAL_TEMP, 7) | ||
247 | DEFBIT(ADCEN2, GPIO0, 3) | ||
248 | DEFBIT(ADCEN2, GPIO1, 2) | ||
249 | DEFBIT(ADCEN2, GPIO2, 1) | ||
250 | DEFBIT(ADCEN2, GPIO3, 0) | ||
251 | |||
252 | DEFFLD(ADCCTL, SAMPLE_RATE, 7, 6) | ||
253 | DEFFLD(ADCCTL, TS_OUT_CURR, 5, 4) | ||
254 | DEFBIT(ADCCTL, TS_FUNCTION, 2) | ||
255 | DEFFLD(ADCCTL, TS_OUT_MODE, 1, 0) | ||
256 | |||
257 | DEFBIT(ADCRANGE, GPIO3HIGH, 3) | ||
258 | DEFBIT(ADCRANGE, GPIO2HIGH, 2) | ||
259 | DEFBIT(ADCRANGE, GPIO1HIGH, 1) | ||
260 | DEFBIT(ADCRANGE, GPIO0HIGH, 0) | ||
261 | |||
262 | DEFBIT(TIMERCTL, TIMEOUT, 7) | ||
263 | DEFFLD(TIMERCTL, DURATION, 6, 0) | ||
264 | |||
265 | DEFFLD(VBUSSRP, VBUSVALID_VOLTAGE, 5, 4) | ||
266 | DEFBIT(VBUSSRP, VBUSVALID_MONITOR, 3) | ||
267 | DEFBIT(VBUSSRP, VBUS_SESS_MONITOR, 2) | ||
268 | DEFBIT(VBUSSRP, VBUS_DCHG_RESISTOR, 1) | ||
269 | DEFBIT(VBUSSRP, VBUS_CHG_RESISTOR, 0) | ||
270 | |||
271 | DEFBIT(OTPOWEROFF, ENABLE, 2) | ||
272 | |||
273 | DEFFLD(GPIO0FUNC, VALUE, 2, 0) | ||
274 | DEFFLD(GPIO0LDO, VALUE, 7, 4) | ||
275 | DEFFLD(GPIO1FUNC, VALUE, 2, 0) | ||
276 | DEFFLD(GPIO2FUNC, VALUE, 2, 0) | ||
277 | |||
278 | DEFBIT(GPIOLEVEL1, IN2, 6) | ||
279 | DEFBIT(GPIOLEVEL1, IN1, 5) | ||
280 | DEFBIT(GPIOLEVEL1, IN0, 4) | ||
281 | DEFBIT(GPIOLEVEL1, OUT2, 2) | ||
282 | DEFBIT(GPIOLEVEL1, OUT1, 1) | ||
283 | DEFBIT(GPIOLEVEL1, OUT0, 0) | ||
284 | |||
285 | DEFFLD(GPIO3GPIO4FUNC, FUNC3, 3, 2) | ||
286 | DEFFLD(GPIO3GPIO4FUNC, FUNC4, 1, 0) | ||
287 | |||
288 | DEFBIT(GPIOLEVEL2, IN4, 5) | ||
289 | DEFBIT(GPIOLEVEL2, IN3, 4) | ||
290 | DEFBIT(GPIOLEVEL2, OUT4, 1) | ||
291 | DEFBIT(GPIOLEVEL2, OUT3, 0) | ||
292 | |||
293 | DEFBIT(GPIOPULL, PULL2, 2) | ||
294 | DEFBIT(GPIOPULL, PULL1, 1) | ||
295 | DEFBIT(GPIOPULL, PULL0, 0) | ||
296 | |||
297 | DEFBIT(NRSTO, FUNC, 7) | ||
298 | DEFBIT(NRSTO, GPIO_DIR, 6) | ||
299 | DEFBIT(NRSTO, GPIO_OUT, 5) | ||
300 | DEFBIT(NRSTO, GPIO_IN, 4) | ||
301 | |||
302 | DEFBIT(CC_CTL, OPEN, 7) | ||
303 | DEFBIT(CC_CTL, PAUSE, 6) | ||
304 | DEFBIT(CC_CTL, CLEAR, 5) | ||
305 | |||
306 | #undef DEFBIT | ||
307 | #undef DEFFLD | ||
308 | #undef DEFREG | ||