diff options
Diffstat (limited to 'firmware/export/as3525.h')
-rw-r--r-- | firmware/export/as3525.h | 36 |
1 files changed, 32 insertions, 4 deletions
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h index ea3c5784cb..f2f16c8d23 100644 --- a/firmware/export/as3525.h +++ b/firmware/export/as3525.h | |||
@@ -306,20 +306,48 @@ interface */ | |||
306 | /* GPIO registers */ | 306 | /* GPIO registers */ |
307 | 307 | ||
308 | #define GPIOA_DIR (*(volatile unsigned char*)(GPIOA_BASE+0x400)) | 308 | #define GPIOA_DIR (*(volatile unsigned char*)(GPIOA_BASE+0x400)) |
309 | #define GPIOA_IS (*(volatile unsigned char*)(GPIOA_BASE+0x404)) | ||
310 | #define GPIOA_IBE (*(volatile unsigned char*)(GPIOA_BASE+0x408)) | ||
311 | #define GPIOA_IEV (*(volatile unsigned char*)(GPIOA_BASE+0x40C)) | ||
312 | #define GPIOA_IE (*(volatile unsigned char*)(GPIOA_BASE+0x410)) | ||
313 | #define GPIOA_RIS (*(volatile unsigned char*)(GPIOA_BASE+0x414)) | ||
314 | #define GPIOA_MIS (*(volatile unsigned char*)(GPIOA_BASE+0x418)) | ||
315 | #define GPIOA_IC (*(volatile unsigned char*)(GPIOA_BASE+0x41C)) | ||
309 | #define GPIOA_AFSEL (*(volatile unsigned char*)(GPIOA_BASE+0x420)) | 316 | #define GPIOA_AFSEL (*(volatile unsigned char*)(GPIOA_BASE+0x420)) |
310 | #define GPIOA_PIN(a) (*(volatile unsigned char*)(GPIOA_BASE+4*(1<<(a)))) | 317 | #define GPIOA_PIN(a) (*(volatile unsigned char*)(GPIOA_BASE+(1<<((a)+2)))) |
311 | 318 | ||
312 | #define GPIOB_DIR (*(volatile unsigned char*)(GPIOB_BASE+0x400)) | 319 | #define GPIOB_DIR (*(volatile unsigned char*)(GPIOB_BASE+0x400)) |
320 | #define GPIOB_IS (*(volatile unsigned char*)(GPIOB_BASE+0x404)) | ||
321 | #define GPIOB_IBE (*(volatile unsigned char*)(GPIOB_BASE+0x408)) | ||
322 | #define GPIOB_IEV (*(volatile unsigned char*)(GPIOB_BASE+0x40C)) | ||
323 | #define GPIOB_IE (*(volatile unsigned char*)(GPIOB_BASE+0x410)) | ||
324 | #define GPIOB_RIS (*(volatile unsigned char*)(GPIOB_BASE+0x414)) | ||
325 | #define GPIOB_MIS (*(volatile unsigned char*)(GPIOB_BASE+0x418)) | ||
326 | #define GPIOB_IC (*(volatile unsigned char*)(GPIOB_BASE+0x41C)) | ||
313 | #define GPIOB_AFSEL (*(volatile unsigned char*)(GPIOB_BASE+0x420)) | 327 | #define GPIOB_AFSEL (*(volatile unsigned char*)(GPIOB_BASE+0x420)) |
314 | #define GPIOB_PIN(a) (*(volatile unsigned char*)(GPIOB_BASE+4*(1<<(a)))) | 328 | #define GPIOB_PIN(a) (*(volatile unsigned char*)(GPIOB_BASE+(1<<((a)+2)))) |
315 | 329 | ||
316 | #define GPIOC_DIR (*(volatile unsigned char*)(GPIOC_BASE+0x400)) | 330 | #define GPIOC_DIR (*(volatile unsigned char*)(GPIOC_BASE+0x400)) |
331 | #define GPIOC_IS (*(volatile unsigned char*)(GPIOC_BASE+0x404)) | ||
332 | #define GPIOC_IBE (*(volatile unsigned char*)(GPIOC_BASE+0x408)) | ||
333 | #define GPIOC_IEV (*(volatile unsigned char*)(GPIOC_BASE+0x40C)) | ||
334 | #define GPIOC_IE (*(volatile unsigned char*)(GPIOC_BASE+0x410)) | ||
335 | #define GPIOC_RIS (*(volatile unsigned char*)(GPIOC_BASE+0x414)) | ||
336 | #define GPIOC_MIS (*(volatile unsigned char*)(GPIOC_BASE+0x418)) | ||
337 | #define GPIOC_IC (*(volatile unsigned char*)(GPIOC_BASE+0x41C)) | ||
317 | #define GPIOC_AFSEL (*(volatile unsigned char*)(GPIOC_BASE+0x420)) | 338 | #define GPIOC_AFSEL (*(volatile unsigned char*)(GPIOC_BASE+0x420)) |
318 | #define GPIOC_PIN(a) (*(volatile unsigned char*)(GPIOC_BASE+4*(1<<(a)))) | 339 | #define GPIOC_PIN(a) (*(volatile unsigned char*)(GPIOC_BASE+(1<<((a)+2)))) |
319 | 340 | ||
320 | #define GPIOD_DIR (*(volatile unsigned char*)(GPIOD_BASE+0x400)) | 341 | #define GPIOD_DIR (*(volatile unsigned char*)(GPIOD_BASE+0x400)) |
342 | #define GPIOD_IS (*(volatile unsigned char*)(GPIOD_BASE+0x404)) | ||
343 | #define GPIOD_IBE (*(volatile unsigned char*)(GPIOD_BASE+0x408)) | ||
344 | #define GPIOD_IEV (*(volatile unsigned char*)(GPIOD_BASE+0x40C)) | ||
345 | #define GPIOD_IE (*(volatile unsigned char*)(GPIOD_BASE+0x410)) | ||
346 | #define GPIOD_RIS (*(volatile unsigned char*)(GPIOD_BASE+0x414)) | ||
347 | #define GPIOD_MIS (*(volatile unsigned char*)(GPIOD_BASE+0x418)) | ||
348 | #define GPIOD_IC (*(volatile unsigned char*)(GPIOD_BASE+0x41C)) | ||
321 | #define GPIOD_AFSEL (*(volatile unsigned char*)(GPIOD_BASE+0x420)) | 349 | #define GPIOD_AFSEL (*(volatile unsigned char*)(GPIOD_BASE+0x420)) |
322 | #define GPIOD_PIN(a) (*(volatile unsigned char*)(GPIOD_BASE+4*(1<<(a)))) | 350 | #define GPIOD_PIN(a) (*(volatile unsigned char*)(GPIOD_BASE+(1<<((a)+2)))) |
323 | 351 | ||
324 | /* ARM PL172 Memory Controller registers */ | 352 | /* ARM PL172 Memory Controller registers */ |
325 | 353 | ||