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Diffstat (limited to 'firmware/export/ak4376.h')
-rw-r--r--firmware/export/ak4376.h42
1 files changed, 21 insertions, 21 deletions
diff --git a/firmware/export/ak4376.h b/firmware/export/ak4376.h
index eb06755e92..eab0bc24f3 100644
--- a/firmware/export/ak4376.h
+++ b/firmware/export/ak4376.h
@@ -104,10 +104,12 @@ AUDIOHW_SETTING(POWER_MODE, "", 0, 1, 0, 1, 0)
104#define AK4376_FS_176 17 104#define AK4376_FS_176 17
105#define AK4376_FS_192 18 105#define AK4376_FS_192 18
106 106
107/* Functions to power on / off the DAC which should be called from 107/* Functions to power on / off the DAC.
108 * the target's audiohw_init() / audiohw_close() implementation. 108 *
109 * NOTE: Target must call ak4376_set_frequency() after ak4376_open() to
110 * finish the power-up sequence of the headphone amp.
109 */ 111 */
110extern void ak4376_init(void); 112extern void ak4376_open(void);
111extern void ak4376_close(void); 113extern void ak4376_close(void);
112 114
113/* Register read/write. Cached to avoid redundant reads/writes. */ 115/* Register read/write. Cached to avoid redundant reads/writes. */
@@ -117,16 +119,17 @@ extern int ak4376_read(int reg);
117/* Target-specific function to set the PDN pin level. */ 119/* Target-specific function to set the PDN pin level. */
118extern void ak4376_set_pdn_pin(int level); 120extern void ak4376_set_pdn_pin(int level);
119 121
120/* Target-specific function to control the external master clock frequency. 122/* Set overall output volume */
121 * This is called by the ak4376's audiohw implementation when switching to 123extern void ak4376_set_volume(int vol_l, int vol_r);
122 * or from a frequency that is configured to use this clock source. 124
123 * 125/* Set the roll-off filter */
124 * - hw_freq is the new sample rate -- one of the HW_FREQ_XX constants. 126extern void ak4376_set_filter_roll_off(int val);
125 * - enabled is true if clock should be output, false if not. 127
128/* Set audio sampling frequency and power mode.
126 * 129 *
127 * The return value is the master clock rate as a multiple of the sampling 130 * If the I2S master clock is being supplied externally, the caller must also
128 * frequency. The allowed multiples depend on the sampling frequency, shown 131 * give the master clock multiplier 'mult'. The accepted values depend on the
129 * in the table below. 132 * sampling rate, see below:
130 * 133 *
131 * +-----------+------------------------+ 134 * +-----------+------------------------+
132 * | frequency | master clock rate | 135 * | frequency | master clock rate |
@@ -137,16 +140,13 @@ extern void ak4376_set_pdn_pin(int level);
137 * | 128 - 192 | 128fs | 140 * | 128 - 192 | 128fs |
138 * +-----------+------------------------+ 141 * +-----------+------------------------+
139 * 142 *
140 * For example, at 48 KHz you could return either 256 or 512 depending on 143 * Switching between high-power and low-power mode requires the same registers
141 * the rate you decided to actually use. 144 * and power-up / power-down sequences as a frequency switch, so both settings
142 * 145 * are controlled by this function.
143 * You need to return a valid master multiplier for supported frequencies
144 * even when enabled = false, since the driver needs to know the multiplier
145 * _before_ enabling the clock.
146 * 146 *
147 * For unsupported frequencies you don't need to return a valid master 147 * high power mode -- use power_mode=0
148 * multiplier, because the DAC doesn't need the return value in such cases. 148 * low power mode -- use power_mode=1
149 */ 149 */
150extern int ak4376_set_mclk_freq(int hw_freq, bool enabled); 150extern void ak4376_set_freqmode(int fsel, int mult, int power_mode);
151 151
152#endif /* __AK4376_H__ */ 152#endif /* __AK4376_H__ */