diff options
Diffstat (limited to 'firmware/drivers')
-rw-r--r-- | firmware/drivers/audio/es9018k2m.c | 48 |
1 files changed, 45 insertions, 3 deletions
diff --git a/firmware/drivers/audio/es9018k2m.c b/firmware/drivers/audio/es9018k2m.c index e19cf6e8a9..3f14aaea39 100644 --- a/firmware/drivers/audio/es9018k2m.c +++ b/firmware/drivers/audio/es9018k2m.c | |||
@@ -55,15 +55,20 @@ static int vol_tenthdb2hw(const int tdb) | |||
55 | * static uint8_t reg4_automute_time = 0x00; // Automute time. Default = disabled | 55 | * static uint8_t reg4_automute_time = 0x00; // Automute time. Default = disabled |
56 | * static uint8_t reg5_automute_level = 0x68; // Automute level. Default is some level | 56 | * static uint8_t reg5_automute_level = 0x68; // Automute level. Default is some level |
57 | * static uint8_t reg6_deemphasis = 0x4A; // Deemphasis. Default = disabled | 57 | * static uint8_t reg6_deemphasis = 0x4A; // Deemphasis. Default = disabled |
58 | * static uint8_t reg7_general_settings = 0x80; // General settings. Default sharp fir, pcm iir and unmuted | 58 | */ |
59 | static uint8_t reg7_general_settings = 0x80; // General settings. Default sharp fir, pcm iir and unmuted | ||
60 | /* | ||
59 | * static uint8_t reg8_gpio_configuration = 0x10; // GPIO configuration | 61 | * static uint8_t reg8_gpio_configuration = 0x10; // GPIO configuration |
60 | * static uint8_t reg10_master_mode_control = 0x05; // Master Mode Control. Default value: master mode off | 62 | * static uint8_t reg10_master_mode_control = 0x05; // Master Mode Control. Default value: master mode off |
61 | * static uint8_t reg11_channel_mapping = 0x02; // Channel Mapping. Default stereo is Ch1=left, Ch2=right | 63 | * static uint8_t reg11_channel_mapping = 0x02; // Channel Mapping. Default stereo is Ch1=left, Ch2=right |
62 | * static uint8_t reg12_dpll_settings = 0x5A; // DPLL Settings. Default = 5 for I2S, A for DSD | 64 | * static uint8_t reg12_dpll_settings = 0x5A; // DPLL Settings. Default = 5 for I2S, A for DSD |
63 | * static uint8_t reg13_thd_comp = 0x40; // THD Compensation | 65 | * static uint8_t reg13_thd_comp = 0x40; // THD Compensation |
64 | * static uint8_t reg14_softstart_settings = 0x8A; // Soft Start Settings | 66 | * static uint8_t reg14_softstart_settings = 0x8A; // Soft Start Settings |
65 | * static uint8_t reg21_gpio_input_selection = 0x00; // Oversampling filter. Default: oversampling ON | ||
66 | */ | 67 | */ |
68 | static uint8_t reg21_gpio_input_selection = 0x00; // Oversampling filter. Default: oversampling ON | ||
69 | |||
70 | #define bitSet(value, bit) ((value) |= (1UL << (bit))) | ||
71 | #define bitClear(value, bit) ((value) &= ~(1UL << (bit))) | ||
67 | 72 | ||
68 | static uint8_t vol_reg_l = ES9018K2M_REG15_VOLUME_L; | 73 | static uint8_t vol_reg_l = ES9018K2M_REG15_VOLUME_L; |
69 | static uint8_t reg15_vol_l = 0; | 74 | static uint8_t reg15_vol_l = 0; |
@@ -95,7 +100,7 @@ i2c_descriptor vol_desc_r = { | |||
95 | .next = NULL, | 100 | .next = NULL, |
96 | }; | 101 | }; |
97 | 102 | ||
98 | void es9018k2m_set_volume(int vol_l, int vol_r) | 103 | void es9018k2m_set_volume_async(int vol_l, int vol_r) |
99 | { | 104 | { |
100 | /* Queue writes to the DAC's volume. | 105 | /* Queue writes to the DAC's volume. |
101 | * Note that this needs to be done asynchronously. From testing, calling | 106 | * Note that this needs to be done asynchronously. From testing, calling |
@@ -106,6 +111,43 @@ void es9018k2m_set_volume(int vol_l, int vol_r) | |||
106 | i2c_async_queue(ES9018K2M_BUS, TIMEOUT_NOBLOCK, I2C_Q_ADD, 0, &vol_desc_r); | 111 | i2c_async_queue(ES9018K2M_BUS, TIMEOUT_NOBLOCK, I2C_Q_ADD, 0, &vol_desc_r); |
107 | } | 112 | } |
108 | 113 | ||
114 | void es9018k2m_set_filter_roll_off(int value) | ||
115 | { | ||
116 | /* Note: the ihifi800 implementation manipulates | ||
117 | * bit 0 of reg21, but I think that is incorrect? | ||
118 | * Bit 2 is the bypass for the IIR digital filters, | ||
119 | * Whereas Bit 0 is the oversampling filter, which | ||
120 | * the datasheet seems to say should be left on. */ | ||
121 | |||
122 | /* 0 = "Sharp" / Fast Rolloff (Default) | ||
123 | 1 = Slow Rolloff | ||
124 | 2 = "Short" / Minimum Phase | ||
125 | 3 = Bypass */ | ||
126 | switch(value) | ||
127 | { | ||
128 | case 0: | ||
129 | bitClear(reg7_general_settings, 5); | ||
130 | bitClear(reg7_general_settings, 6); | ||
131 | bitClear(reg21_gpio_input_selection, 2); | ||
132 | break; | ||
133 | case 1: | ||
134 | bitSet(reg7_general_settings, 5); | ||
135 | bitClear(reg7_general_settings, 6); | ||
136 | bitClear(reg21_gpio_input_selection, 2); | ||
137 | break; | ||
138 | case 2: | ||
139 | bitClear(reg7_general_settings, 5); | ||
140 | bitSet(reg7_general_settings, 6); | ||
141 | bitClear(reg21_gpio_input_selection, 2); | ||
142 | break; | ||
143 | case 3: | ||
144 | bitSet(reg21_gpio_input_selection, 2); | ||
145 | break; | ||
146 | } | ||
147 | es9018k2m_write_reg(ES9018K2M_REG7_GENERAL_SETTINGS, reg7_general_settings); | ||
148 | es9018k2m_write_reg(ES9018K2M_REG21_GPIO_INPUT_SELECT, reg21_gpio_input_selection); | ||
149 | } | ||
150 | |||
109 | /* returns I2C_STATUS_OK upon success, I2C_STATUS_* errors upon error */ | 151 | /* returns I2C_STATUS_OK upon success, I2C_STATUS_* errors upon error */ |
110 | int es9018k2m_write_reg(uint8_t reg, uint8_t val) | 152 | int es9018k2m_write_reg(uint8_t reg, uint8_t val) |
111 | { | 153 | { |