diff options
Diffstat (limited to 'firmware/drivers')
-rw-r--r-- | firmware/drivers/adc.c | 46 | ||||
-rw-r--r-- | firmware/drivers/ata.c | 130 | ||||
-rw-r--r-- | firmware/drivers/button.c | 34 | ||||
-rw-r--r-- | firmware/drivers/i2c.c | 28 | ||||
-rw-r--r-- | firmware/drivers/lcd-recorder.c | 59 | ||||
-rw-r--r-- | firmware/drivers/led.c | 6 | ||||
-rw-r--r-- | firmware/drivers/power.c | 20 | ||||
-rw-r--r-- | firmware/drivers/serial.c | 4 |
8 files changed, 12 insertions, 315 deletions
diff --git a/firmware/drivers/adc.c b/firmware/drivers/adc.c index adeace005b..f002be96b4 100644 --- a/firmware/drivers/adc.c +++ b/firmware/drivers/adc.c | |||
@@ -109,50 +109,4 @@ void adc_init(void) | |||
109 | sleep(2); /* Ensure valid readings when adc_init returns */ | 109 | sleep(2); /* Ensure valid readings when adc_init returns */ |
110 | } | 110 | } |
111 | 111 | ||
112 | #elif CONFIG_CPU == TCC730 | ||
113 | |||
114 | |||
115 | /************************************************************************** | ||
116 | ** | ||
117 | ** Each channel will be updated HZ/CHANNEL_ORDER_SIZE times per second. | ||
118 | ** | ||
119 | *************************************************************************/ | ||
120 | |||
121 | static int current_channel; | ||
122 | static int current_channel_idx; | ||
123 | static unsigned short adcdata[NUM_ADC_CHANNELS]; | ||
124 | |||
125 | #define CHANNEL_ORDER_SIZE 2 | ||
126 | static int channel_order[CHANNEL_ORDER_SIZE] = {6,7}; | ||
127 | |||
128 | static void adc_tick(void) | ||
129 | { | ||
130 | if (ADCON & (1 << 3)) { | ||
131 | /* previous conversion finished? */ | ||
132 | adcdata[current_channel] = ADDATA >> 6; | ||
133 | if (++current_channel_idx >= CHANNEL_ORDER_SIZE) | ||
134 | current_channel_idx = 0; | ||
135 | current_channel = channel_order[current_channel_idx]; | ||
136 | int adcon = (current_channel << 4) | 1; | ||
137 | ADCON = adcon; | ||
138 | } | ||
139 | } | ||
140 | |||
141 | unsigned short adc_read(int channel) | ||
142 | { | ||
143 | return adcdata[channel]; | ||
144 | } | ||
145 | |||
146 | void adc_init(void) | ||
147 | { | ||
148 | current_channel_idx = 0; | ||
149 | current_channel = channel_order[current_channel_idx]; | ||
150 | |||
151 | ADCON = (current_channel << 4) | 1; | ||
152 | |||
153 | tick_add_task(adc_tick); | ||
154 | |||
155 | sleep(2); /* Ensure valid readings when adc_init returns */ | ||
156 | } | ||
157 | |||
158 | #endif | 112 | #endif |
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c index 4017d5f3f7..c882c22fe1 100644 --- a/firmware/drivers/ata.c +++ b/firmware/drivers/ata.c | |||
@@ -84,104 +84,6 @@ | |||
84 | #define SET_REG(reg,val) reg = (val) | 84 | #define SET_REG(reg,val) reg = (val) |
85 | #define SET_16BITREG(reg,val) reg = (val) | 85 | #define SET_16BITREG(reg,val) reg = (val) |
86 | 86 | ||
87 | #elif CONFIG_CPU == TCC730 | ||
88 | |||
89 | /* Plain C read & write loops */ | ||
90 | #define PREFER_C_READING | ||
91 | #define PREFER_C_WRITING | ||
92 | |||
93 | #define SWAP_WORDS | ||
94 | |||
95 | #define ATA_DATA_IDX (0xD0) | ||
96 | #define ATA_ERROR_IDX (0xD2) | ||
97 | #define ATA_NSECTOR_IDX (0xD4) | ||
98 | #define ATA_SECTOR_IDX (0xD6) | ||
99 | #define ATA_LCYL_IDX (0xD8) | ||
100 | #define ATA_HCYL_IDX (0xDA) | ||
101 | #define ATA_SELECT_IDX (0xDC) | ||
102 | #define ATA_COMMAND_IDX (0xDE) | ||
103 | #define ATA_CONTROL_IDX (0xEC) | ||
104 | |||
105 | #define ATA_FEATURE_IDX ATA_ERROR_IDX | ||
106 | #define ATA_STATUS_IDX ATA_COMMAND_IDX | ||
107 | #define ATA_ALT_STATUS_IDX ATA_CONTROL_IDX | ||
108 | |||
109 | #define SET_REG(reg, value) (ide_write_register(reg ## _IDX, value)) | ||
110 | #define SET_16BITREG(reg, value) (ide_write_register(reg ## _IDX, value)) | ||
111 | #define GET_REG(reg) (ide_read_register(reg)) | ||
112 | |||
113 | #define ATA_DATA (GET_REG(ATA_DATA_IDX)) | ||
114 | #define ATA_ERROR (GET_REG(ATA_ERROR_IDX)) | ||
115 | #define ATA_NSECTOR (GET_REG(ATA_NSECTOR_IDX)) | ||
116 | #define ATA_SECTOR (GET_REG(ATA_SECTOR_IDX)) | ||
117 | #define ATA_LCYL (GET_REG(ATA_LCYL_IDX)) | ||
118 | #define ATA_HCYL (GET_REG(ATA_HCYL_IDX)) | ||
119 | #define ATA_SELECT (GET_REG(ATA_SELECT_IDX)) | ||
120 | #define ATA_COMMAND (GET_REG(ATA_COMMAND_IDX)) | ||
121 | |||
122 | #define ATA_CONTROL (GET_REG(ATA_CONTROL_IDX)) | ||
123 | |||
124 | #define STATUS_BSY 0x80 | ||
125 | #define STATUS_RDY 0x40 | ||
126 | #define STATUS_DF 0x20 | ||
127 | #define STATUS_DRQ 0x08 | ||
128 | #define STATUS_ERR 0x01 | ||
129 | |||
130 | #define ERROR_ABRT 0x04 | ||
131 | |||
132 | #define WRITE_PATTERN1 0xa5 | ||
133 | #define WRITE_PATTERN2 0x5a | ||
134 | #define WRITE_PATTERN3 0xaa | ||
135 | #define WRITE_PATTERN4 0x55 | ||
136 | |||
137 | #define READ_PATTERN1 0xa5 | ||
138 | #define READ_PATTERN2 0x5a | ||
139 | #define READ_PATTERN3 0xaa | ||
140 | #define READ_PATTERN4 0x55 | ||
141 | |||
142 | #define READ_PATTERN1_MASK 0xff | ||
143 | #define READ_PATTERN2_MASK 0xff | ||
144 | #define READ_PATTERN3_MASK 0xff | ||
145 | #define READ_PATTERN4_MASK 0xff | ||
146 | |||
147 | static unsigned char ide_sector_data[SECTOR_SIZE] __attribute__ ((section(".idata"))); | ||
148 | static unsigned ide_reg_temp __attribute__ ((section(".idata"))); | ||
149 | |||
150 | void ide_write_register(int reg, int value) { | ||
151 | /* Archos firmware code does (sometimes!) this: | ||
152 | set the RAM speed to 8 cycles. | ||
153 | MIUSCFG |= 0x7; | ||
154 | */ | ||
155 | |||
156 | ide_reg_temp = value; | ||
157 | |||
158 | long extAddr = (long)reg << 16; | ||
159 | ddma_transfer(1, 1, &ide_reg_temp, extAddr, 2); | ||
160 | |||
161 | /* set the RAM speed to 6 cycles. | ||
162 | unsigned char miuscfg = MIUSCFG; | ||
163 | miuscfg = (miuscfg & ~7) | 5; | ||
164 | */ | ||
165 | } | ||
166 | |||
167 | int ide_read_register(int reg) { | ||
168 | /* set the RAM speed to 6 cycles. | ||
169 | unsigned char miuscfg = MIUSCFG; | ||
170 | miuscfg = (miuscfg & ~7) | 5; | ||
171 | MIUSCFG = miuscfg; */ | ||
172 | |||
173 | long extAddr = (long)reg << 16; | ||
174 | ddma_transfer(0, 1, &ide_reg_temp, extAddr, 2); | ||
175 | |||
176 | /* This is done like this in the archos firmware... | ||
177 | miuscfg = MIUSCFG; | ||
178 | miuscfg = (miuscfg & ~7) | 5; | ||
179 | MIUSCFG = miuscfg; | ||
180 | Though I'd expect MIUSCFG &= ~0x7; (1 cycle) */ | ||
181 | |||
182 | return ide_reg_temp; | ||
183 | } | ||
184 | |||
185 | #endif | 87 | #endif |
186 | 88 | ||
187 | #ifndef NOINLINE_ATTR | 89 | #ifndef NOINLINE_ATTR |
@@ -349,16 +251,7 @@ static void copy_read_sectors(unsigned char* buf, int wordcount) | |||
349 | } while (++wbuf < wbufend); /* tail loop is faster */ | 251 | } while (++wbuf < wbufend); /* tail loop is faster */ |
350 | } | 252 | } |
351 | #else /* !PREFER_C_READING */ | 253 | #else /* !PREFER_C_READING */ |
352 | #if CONFIG_CPU == TCC730 | 254 | #if defined(CPU_COLDFIRE) |
353 | int sectorcount = wordcount / 0x100; | ||
354 | do { | ||
355 | /* Slurp an entire sector with a single dma transfer */ | ||
356 | ddma_transfer(0, 1, ide_sector_data, ATA_DATA_IDX << 16, SECTOR_SIZE); | ||
357 | memcpy(buf, ide_sector_data, SECTOR_SIZE); | ||
358 | buf += SECTOR_SIZE; | ||
359 | sectorcount--; | ||
360 | } while (sectorcount > 0); | ||
361 | #elif defined(CPU_COLDFIRE) | ||
362 | unsigned char* bufend = buf + 2 * wordcount; | 255 | unsigned char* bufend = buf + 2 * wordcount; |
363 | /* coldfire asm reading, utilising line bursts */ | 256 | /* coldfire asm reading, utilising line bursts */ |
364 | /* this assumes there is at least one full line to copy */ | 257 | /* this assumes there is at least one full line to copy */ |
@@ -1416,23 +1309,6 @@ int ata_hard_reset(void) | |||
1416 | /* state HRR1 */ | 1309 | /* state HRR1 */ |
1417 | or_b(0x02, &PADRH); /* negate _RESET */ | 1310 | or_b(0x02, &PADRH); /* negate _RESET */ |
1418 | sleep(1); /* > 2ms */ | 1311 | sleep(1); /* > 2ms */ |
1419 | #elif CONFIG_CPU == TCC730 | ||
1420 | |||
1421 | P6 &= ~0x40; | ||
1422 | ddma_transfer(0, 1, ide_sector_data, 0xF00000, SECTOR_SIZE); | ||
1423 | P6 |= 0x40; | ||
1424 | |||
1425 | /* | ||
1426 | What can the following do? | ||
1427 | P1 |= 0x04; | ||
1428 | P10CON &= ~0x56; | ||
1429 | sleep(1); | ||
1430 | |||
1431 | P10CON |= 0x56; | ||
1432 | P10 &= ~0x56; | ||
1433 | P1 &= ~0x04; | ||
1434 | sleep(1); | ||
1435 | */ | ||
1436 | #endif | 1312 | #endif |
1437 | 1313 | ||
1438 | /* state HRR2 */ | 1314 | /* state HRR2 */ |
@@ -1561,8 +1437,6 @@ void ata_enable(bool on) | |||
1561 | or_b(0x80, &PADRL); /* disable ATA */ | 1437 | or_b(0x80, &PADRL); /* disable ATA */ |
1562 | 1438 | ||
1563 | or_b(0x80, &PAIORL); | 1439 | or_b(0x80, &PAIORL); |
1564 | #elif CONFIG_CPU == TCC730 | ||
1565 | |||
1566 | #endif | 1440 | #endif |
1567 | } | 1441 | } |
1568 | #endif | 1442 | #endif |
@@ -1712,8 +1586,6 @@ int ata_init(void) | |||
1712 | int rc; | 1586 | int rc; |
1713 | #ifdef TARGET_TREE | 1587 | #ifdef TARGET_TREE |
1714 | bool coldstart = ata_is_coldstart(); | 1588 | bool coldstart = ata_is_coldstart(); |
1715 | #elif CONFIG_CPU == TCC730 | ||
1716 | bool coldstart = (P1 & 0x80) == 0; | ||
1717 | #else | 1589 | #else |
1718 | bool coldstart = (PACR2 & 0x4000) != 0; | 1590 | bool coldstart = (PACR2 & 0x4000) != 0; |
1719 | #endif | 1591 | #endif |
diff --git a/firmware/drivers/button.c b/firmware/drivers/button.c index 561dc6ee14..01b9174dae 100644 --- a/firmware/drivers/button.c +++ b/firmware/drivers/button.c | |||
@@ -314,8 +314,6 @@ void button_init(void) | |||
314 | PAIOR &= ~0x0820; /* Inputs */ | 314 | PAIOR &= ~0x0820; /* Inputs */ |
315 | #elif CONFIG_KEYPAD == ONDIO_PAD | 315 | #elif CONFIG_KEYPAD == ONDIO_PAD |
316 | /* nothing to initialize here */ | 316 | /* nothing to initialize here */ |
317 | #elif CONFIG_KEYPAD == GMINI100_PAD | ||
318 | /* nothing to initialize here */ | ||
319 | #endif /* CONFIG_KEYPAD */ | 317 | #endif /* CONFIG_KEYPAD */ |
320 | queue_init(&button_queue, true); | 318 | queue_init(&button_queue, true); |
321 | button_read(); | 319 | button_read(); |
@@ -599,38 +597,6 @@ static int button_read(void) | |||
599 | if(adc_read(ADC_BUTTON_ONOFF) < 0x120) /* active low */ | 597 | if(adc_read(ADC_BUTTON_ONOFF) < 0x120) /* active low */ |
600 | btn |= BUTTON_OFF; | 598 | btn |= BUTTON_OFF; |
601 | 599 | ||
602 | #elif CONFIG_KEYPAD == GMINI100_PAD | ||
603 | data = adc_read(7); | ||
604 | if (data < 0x38a) | ||
605 | { | ||
606 | if (data < 0x1c5) | ||
607 | if (data < 0xe3) | ||
608 | btn = BUTTON_LEFT; | ||
609 | else | ||
610 | btn = BUTTON_DOWN; | ||
611 | else | ||
612 | if (data < 0x2a2) | ||
613 | btn = BUTTON_RIGHT; | ||
614 | else | ||
615 | btn = BUTTON_UP; | ||
616 | } | ||
617 | |||
618 | data = adc_read(6); | ||
619 | if (data < 0x355) | ||
620 | { | ||
621 | if (data < 0x288) | ||
622 | if (data < 0x233) | ||
623 | btn |= BUTTON_OFF; | ||
624 | else | ||
625 | btn |= BUTTON_PLAY; | ||
626 | else | ||
627 | btn |= BUTTON_MENU; | ||
628 | } | ||
629 | |||
630 | data = P7; | ||
631 | if (data & 0x01) | ||
632 | btn |= BUTTON_ON; | ||
633 | |||
634 | #endif /* CONFIG_KEYPAD */ | 600 | #endif /* CONFIG_KEYPAD */ |
635 | 601 | ||
636 | #ifdef HAVE_LCD_BITMAP | 602 | #ifdef HAVE_LCD_BITMAP |
diff --git a/firmware/drivers/i2c.c b/firmware/drivers/i2c.c index 2b439c23ad..83ac21fae8 100644 --- a/firmware/drivers/i2c.c +++ b/firmware/drivers/i2c.c | |||
@@ -24,26 +24,6 @@ | |||
24 | #include "system.h" | 24 | #include "system.h" |
25 | 25 | ||
26 | /* cute little functions, atomic read-modify-write */ | 26 | /* cute little functions, atomic read-modify-write */ |
27 | #if CONFIG_I2C == I2C_GMINI | ||
28 | |||
29 | /* This is done like this in the Archos' firmware. | ||
30 | * However, the TCC370 has an integrated I2C | ||
31 | * controller (bound to the same lines). It should be | ||
32 | * possible to use it and thus save some space in flash. | ||
33 | */ | ||
34 | #define SDA_LO (P3 &= ~0x20) | ||
35 | #define SDA_HI (P3 |= 0x20) | ||
36 | #define SDA_INPUT (P3CONH &= ~0x0C) | ||
37 | #define SDA_OUTPUT (P3CONH |= 0x04) | ||
38 | #define SDA (P3 & 0x20) | ||
39 | |||
40 | #define SCL_LO (P3 &= ~0x10) | ||
41 | #define SCL_HI (P3 |= 0x10) | ||
42 | #define SCL_INPUT (P3CONH &= ~0x03) | ||
43 | #define SCL_OUTPUT (P3CONH |= 0x01) | ||
44 | #define SCL (P3 & 0x10) | ||
45 | |||
46 | #else /* non Gmini below */ | ||
47 | 27 | ||
48 | /* SDA is PB7 */ | 28 | /* SDA is PB7 */ |
49 | #define SDA_LO and_b(~0x80, &PBDRL) | 29 | #define SDA_LO and_b(~0x80, &PBDRL) |
@@ -67,7 +47,6 @@ | |||
67 | #define SCL_HI or_b(0x20, &PBDRH) | 47 | #define SCL_HI or_b(0x20, &PBDRH) |
68 | #define SCL (PBDRH & 0x20) | 48 | #define SCL (PBDRH & 0x20) |
69 | #endif | 49 | #endif |
70 | #endif /* ! I2C_GMINI */ | ||
71 | 50 | ||
72 | /* arbitrary delay loop */ | 51 | /* arbitrary delay loop */ |
73 | #define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0) | 52 | #define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0) |
@@ -106,13 +85,10 @@ void i2c_init(void) | |||
106 | { | 85 | { |
107 | int i; | 86 | int i; |
108 | 87 | ||
109 | #if CONFIG_I2C == I2C_GMINI | 88 | #if CONFIG_I2C == I2C_ONDIO |
110 | SCL_INPUT; | ||
111 | SDA_INPUT; | ||
112 | #elif CONFIG_I2C == I2C_ONDIO | ||
113 | /* make PB6 & PB7 general I/O */ | 89 | /* make PB6 & PB7 general I/O */ |
114 | PBCR2 &= ~0xf000; | 90 | PBCR2 &= ~0xf000; |
115 | #else /* not Gmini, not Ondio */ | 91 | #else /* not Ondio */ |
116 | /* make PB7 & PB13 general I/O */ | 92 | /* make PB7 & PB13 general I/O */ |
117 | PBCR1 &= ~0x0c00; /* PB13 */ | 93 | PBCR1 &= ~0x0c00; /* PB13 */ |
118 | PBCR2 &= ~0xc000; /* PB7 */ | 94 | PBCR2 &= ~0xc000; /* PB7 */ |
diff --git a/firmware/drivers/lcd-recorder.c b/firmware/drivers/lcd-recorder.c index ceeb413709..5c4a0352a7 100644 --- a/firmware/drivers/lcd-recorder.c +++ b/firmware/drivers/lcd-recorder.c | |||
@@ -108,35 +108,7 @@ static const char scroll_tick_table[16] = { | |||
108 | 108 | ||
109 | /* optimised archos recorder code is in lcd.S */ | 109 | /* optimised archos recorder code is in lcd.S */ |
110 | 110 | ||
111 | #if CONFIG_CPU == TCC730 | 111 | #if CONFIG_CPU == PNX0101 |
112 | /* Optimization opportunity: | ||
113 | In the following I do exactly as in the archos firmware. | ||
114 | There is probably a better way (ie. do only one mask operation) | ||
115 | */ | ||
116 | void lcd_write_command(int cmd) { | ||
117 | P2 &= 0xF7; | ||
118 | P2 &= 0xDF; | ||
119 | P2 &= 0xFB; | ||
120 | P0 = cmd; | ||
121 | P2 |= 0x04; | ||
122 | P2 |= 0x08; | ||
123 | P2 |= 0x20; | ||
124 | } | ||
125 | |||
126 | void lcd_write_data( const unsigned char* data, int count ) { | ||
127 | int i; | ||
128 | for (i=0; i < count; i++) { | ||
129 | P2 |= 0x08; | ||
130 | P2 &= 0xDF; | ||
131 | P2 &= 0xFB; | ||
132 | P0 = data[i]; | ||
133 | P2 |= 0x04; | ||
134 | P2 |= 0x08; | ||
135 | P2 |= 0x20; | ||
136 | } | ||
137 | } | ||
138 | |||
139 | #elif CONFIG_CPU == PNX0101 | ||
140 | 112 | ||
141 | void lcd_write_command(int cmd) | 113 | void lcd_write_command(int cmd) |
142 | { | 114 | { |
@@ -161,9 +133,7 @@ void lcd_write_data( const unsigned char* data, int count ) | |||
161 | 133 | ||
162 | int lcd_default_contrast(void) | 134 | int lcd_default_contrast(void) |
163 | { | 135 | { |
164 | #if CONFIG_LCD == LCD_GMINI100 | 136 | #if CONFIG_LCD == LCD_IFP7XX |
165 | return 31; | ||
166 | #elif CONFIG_LCD == LCD_IFP7XX | ||
167 | return 45; | 137 | return 45; |
168 | #else | 138 | #else |
169 | return (read_hw_mask() & LCD_CONTRAST_BIAS) ? 31 : 49; | 139 | return (read_hw_mask() & LCD_CONTRAST_BIAS) ? 31 : 49; |
@@ -192,20 +162,6 @@ void lcd_set_flip(bool yesno) | |||
192 | #else | 162 | #else |
193 | if (yesno) | 163 | if (yesno) |
194 | #endif | 164 | #endif |
195 | #if CONFIG_LCD == LCD_GMINI100 | ||
196 | { | ||
197 | lcd_write_command(LCD_SET_SEGMENT_REMAP | 0x01); | ||
198 | lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION | 0x08); | ||
199 | xoffset = 132 - LCD_WIDTH; | ||
200 | } | ||
201 | else | ||
202 | { | ||
203 | lcd_write_command(LCD_SET_SEGMENT_REMAP); | ||
204 | lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION | 0x08); | ||
205 | xoffset = 0; | ||
206 | } | ||
207 | #else | ||
208 | |||
209 | { | 165 | { |
210 | lcd_write_command(LCD_SET_SEGMENT_REMAP); | 166 | lcd_write_command(LCD_SET_SEGMENT_REMAP); |
211 | lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION); | 167 | lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION); |
@@ -221,7 +177,6 @@ void lcd_set_flip(bool yesno) | |||
221 | xoffset = 0; | 177 | xoffset = 0; |
222 | #endif | 178 | #endif |
223 | } | 179 | } |
224 | #endif | ||
225 | } | 180 | } |
226 | 181 | ||
227 | #endif /* !SIMULATOR */ | 182 | #endif /* !SIMULATOR */ |
@@ -238,15 +193,7 @@ void lcd_init(void) | |||
238 | 193 | ||
239 | void lcd_init(void) | 194 | void lcd_init(void) |
240 | { | 195 | { |
241 | #if CONFIG_CPU == TCC730 | 196 | #if CONFIG_CPU == PNX0101 |
242 | /* Initialise P0 & some P2 output pins: | ||
243 | P0 -> all pins normal cmos output | ||
244 | P2 -> pins 1 to 5 normal cmos output. */ | ||
245 | P0CON = 0xff; | ||
246 | P2CONL |= 0x5a; | ||
247 | P2CONL &= 0x5b; | ||
248 | P2CONH |= 1; | ||
249 | #elif CONFIG_CPU == PNX0101 | ||
250 | LCDREG10 = 0xf; | 197 | LCDREG10 = 0xf; |
251 | LCDREG04 = 0x4084; | 198 | LCDREG04 = 0x4084; |
252 | #else | 199 | #else |
diff --git a/firmware/drivers/led.c b/firmware/drivers/led.c index 118911a746..a9be9399c8 100644 --- a/firmware/drivers/led.c +++ b/firmware/drivers/led.c | |||
@@ -28,11 +28,6 @@ | |||
28 | void led(bool on) | 28 | void led(bool on) |
29 | { | 29 | { |
30 | if ( on ) | 30 | if ( on ) |
31 | #ifdef GMINI_ARCH | ||
32 | P2 |= 1; | ||
33 | else | ||
34 | P2 &= ~1; | ||
35 | #else | ||
36 | { | 31 | { |
37 | or_b(0x40, &PBDRL); | 32 | or_b(0x40, &PBDRL); |
38 | } | 33 | } |
@@ -40,7 +35,6 @@ void led(bool on) | |||
40 | { | 35 | { |
41 | and_b(~0x40, &PBDRL); | 36 | and_b(~0x40, &PBDRL); |
42 | } | 37 | } |
43 | #endif | ||
44 | } | 38 | } |
45 | 39 | ||
46 | #elif (CONFIG_LED == LED_VIRTUAL) || defined(HAVE_REMOTE_LCD) | 40 | #elif (CONFIG_LED == LED_VIRTUAL) || defined(HAVE_REMOTE_LCD) |
diff --git a/firmware/drivers/power.c b/firmware/drivers/power.c index e0a5de4bfb..872e8b0657 100644 --- a/firmware/drivers/power.c +++ b/firmware/drivers/power.c | |||
@@ -86,9 +86,7 @@ void power_init(void) | |||
86 | #ifdef CONFIG_CHARGING | 86 | #ifdef CONFIG_CHARGING |
87 | bool charger_inserted(void) | 87 | bool charger_inserted(void) |
88 | { | 88 | { |
89 | #if defined(GMINI_ARCH) | 89 | #if CONFIG_CHARGING == CHARGING_CONTROL |
90 | return (P7 & 0x80) == 0; | ||
91 | #elif CONFIG_CHARGING == CHARGING_CONTROL | ||
92 | /* Recorder */ | 90 | /* Recorder */ |
93 | return adc_read(ADC_EXT_POWER) > 0x100; | 91 | return adc_read(ADC_EXT_POWER) > 0x100; |
94 | #elif defined (HAVE_FMADC) | 92 | #elif defined (HAVE_FMADC) |
@@ -139,12 +137,7 @@ void ide_power_enable(bool on) | |||
139 | { | 137 | { |
140 | (void)on; | 138 | (void)on; |
141 | 139 | ||
142 | #if defined(GMINI_ARCH) | 140 | #if defined(TOSHIBA_GIGABEAT_F) |
143 | if(on) | ||
144 | P1 |= 0x08; | ||
145 | else | ||
146 | P1 &= ~0x08; | ||
147 | #elif defined(TOSHIBA_GIGABEAT_F) | ||
148 | /* Gigabeat TODO */ | 141 | /* Gigabeat TODO */ |
149 | #else /* SH1 based archos */ | 142 | #else /* SH1 based archos */ |
150 | bool touched = false; | 143 | bool touched = false; |
@@ -189,9 +182,7 @@ void ide_power_enable(bool on) | |||
189 | 182 | ||
190 | bool ide_powered(void) | 183 | bool ide_powered(void) |
191 | { | 184 | { |
192 | #if defined(GMINI_ARCH) | 185 | #if defined(TOSHIBA_GIGABEAT_F) |
193 | return (P1 & 0x08?true:false); | ||
194 | #elif defined(TOSHIBA_GIGABEAT_F) | ||
195 | return false; | 186 | return false; |
196 | #else /* SH1 based archos */ | 187 | #else /* SH1 based archos */ |
197 | #if defined(NEEDS_ATA_POWER_ON) || defined(HAVE_ATA_POWER_OFF) | 188 | #if defined(NEEDS_ATA_POWER_ON) || defined(HAVE_ATA_POWER_OFF) |
@@ -220,10 +211,7 @@ bool ide_powered(void) | |||
220 | void power_off(void) | 211 | void power_off(void) |
221 | { | 212 | { |
222 | set_irq_level(HIGHEST_IRQ_LEVEL); | 213 | set_irq_level(HIGHEST_IRQ_LEVEL); |
223 | #if defined(GMINI_ARCH) | 214 | #if defined(TOSHIBA_GIGABEAT_F) |
224 | P1 &= ~1; | ||
225 | P1CON &= ~1; | ||
226 | #elif defined(TOSHIBA_GIGABEAT_F) | ||
227 | /* FIXME: Can we turn the device off, or only enter sleep mode? */ | 215 | /* FIXME: Can we turn the device off, or only enter sleep mode? */ |
228 | #else | 216 | #else |
229 | #ifdef HAVE_POWEROFF_ON_PBDR | 217 | #ifdef HAVE_POWEROFF_ON_PBDR |
diff --git a/firmware/drivers/serial.c b/firmware/drivers/serial.c index 5120161467..866d7616ed 100644 --- a/firmware/drivers/serial.c +++ b/firmware/drivers/serial.c | |||
@@ -30,7 +30,7 @@ | |||
30 | 30 | ||
31 | #if CONFIG_CPU == SH7034 | 31 | #if CONFIG_CPU == SH7034 |
32 | 32 | ||
33 | /* FIX: this doesn't work on iRiver or Gmini or iPod yet */ | 33 | /* FIX: this doesn't work on iRiver or iPod yet */ |
34 | /* iFP7xx has no remote */ | 34 | /* iFP7xx has no remote */ |
35 | 35 | ||
36 | #ifndef HAVE_MMC /* MMC takes serial port 1, so don't mess with it */ | 36 | #ifndef HAVE_MMC /* MMC takes serial port 1, so don't mess with it */ |
@@ -172,4 +172,4 @@ void serial_setup (void) | |||
172 | { | 172 | { |
173 | /* a dummy */ | 173 | /* a dummy */ |
174 | } | 174 | } |
175 | #endif /* ! (CONFIG_CPU != MCF5249) && (CONFIG_CPU != TCC730) */ | 175 | #endif |