diff options
Diffstat (limited to 'firmware/drivers')
-rw-r--r-- | firmware/drivers/uda1380.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/firmware/drivers/uda1380.c b/firmware/drivers/uda1380.c index 67f8a6dc10..67479fd92e 100644 --- a/firmware/drivers/uda1380.c +++ b/firmware/drivers/uda1380.c | |||
@@ -47,12 +47,12 @@ unsigned short uda1380_defaults[2*NUM_DEFAULT_REGS] = | |||
47 | { | 47 | { |
48 | REG_0, EN_DAC | EN_INT | EN_DEC | SYSCLK_256FS | WSPLL_25_50, | 48 | REG_0, EN_DAC | EN_INT | EN_DEC | SYSCLK_256FS | WSPLL_25_50, |
49 | REG_I2S, I2S_IFMT_IIS, | 49 | REG_I2S, I2S_IFMT_IIS, |
50 | REG_PWR, PON_PLL | PON_HP | PON_DAC | EN_AVC | PON_AVC | PON_BIAS, | 50 | REG_PWR, PON_PLL | PON_DAC | PON_BIAS, /* PON_HP is enabled later */ |
51 | REG_AMIX, AMIX_RIGHT(0x10) | AMIX_LEFT(0x10), /* 00=max, 3f=mute */ | 51 | REG_AMIX, AMIX_RIGHT(0x10) | AMIX_LEFT(0x10), /* 00=max, 3f=mute */ |
52 | REG_MASTER_VOL, MASTER_VOL_LEFT(0x20) | MASTER_VOL_RIGHT(0x20), /* 00=max, ff=mute */ | 52 | REG_MASTER_VOL, MASTER_VOL_LEFT(0x20) | MASTER_VOL_RIGHT(0x20), /* 00=max, ff=mute */ |
53 | REG_MIX_VOL, MIX_VOL_CHANNEL_1(0) | MIX_VOL_CHANNEL_2(0xff), /* 00=max, ff=mute */ | 53 | REG_MIX_VOL, MIX_VOL_CHANNEL_1(0) | MIX_VOL_CHANNEL_2(0xff), /* 00=max, ff=mute */ |
54 | REG_EQ, 0, | 54 | REG_EQ, 0, |
55 | REG_MUTE, MUTE_CH2, /* Mute channel 2 (digital decimation filter) */ | 55 | REG_MUTE, MUTE_MASTER, /* Mute everything to start with */ |
56 | REG_MIX_CTL, 0, | 56 | REG_MIX_CTL, 0, |
57 | REG_DEC_VOL, 0, | 57 | REG_DEC_VOL, 0, |
58 | REG_PGA, MUTE_ADC, | 58 | REG_PGA, MUTE_ADC, |
@@ -134,12 +134,25 @@ int uda1380_init(void) | |||
134 | if (uda1380_set_regs() == -1) | 134 | if (uda1380_set_regs() == -1) |
135 | return -1; | 135 | return -1; |
136 | 136 | ||
137 | /* Sleep a while, then power on headphone amp */ | ||
138 | sleep(HZ/8); | ||
139 | uda1380_write_reg(REG_PWR, uda1380_regs[REG_PWR] | PON_HP); | ||
140 | |||
141 | /* Sleep a little more, then disable the master mute */ | ||
142 | sleep(HZ/8); | ||
143 | uda1380_write_reg(REG_MUTE, MUTE_CH2); | ||
144 | |||
137 | return 0; | 145 | return 0; |
138 | } | 146 | } |
139 | 147 | ||
140 | /* Nice shutdown of UDA1380 codec */ | 148 | /* Nice shutdown of UDA1380 codec */ |
141 | void uda1380_close(void) | 149 | void uda1380_close(void) |
142 | { | 150 | { |
143 | uda1380_write_reg(REG_PWR, 0); /* Disable power */ | 151 | /* First enable mute and sleep a while */ |
152 | uda1380_write_reg(REG_MUTE, MUTE_MASTER); | ||
153 | sleep(HZ/8); | ||
154 | |||
155 | /* Then power off the rest of the chip */ | ||
156 | uda1380_write_reg(REG_PWR, 0); | ||
144 | uda1380_write_reg(REG_0, 0); /* Disable codec */ | 157 | uda1380_write_reg(REG_0, 0); /* Disable codec */ |
145 | } | 158 | } |